at42qt1481 ATMEL Corporation, at42qt1481 Datasheet - Page 8

• Manufacturer Part Number: at42qt1481
• Description: 48-key Qmatrix Ic
• Manufacturer: ATMEL Corporation

2.4
8
Response Time
AT42QT1481
The response time of the QT1481 depends on:
Example, without mains sync:
The worst case response time is computed as:
Tr = (TMS * NDIL) + HPR
TMS = ((NXE + FMEA + (FDIL -1)) * BS)
Tr = (((NXE + FMEA + (FDIL -1)) * BS) *NDIL) + HPR
For the above example values:
Tr = (((8 + 1 + (5-1)) * 1 ms) *2) + 10 ms = 36 ms
The use of the STATUS pin to trigger host sampling can reduce this to approximately 26 ms by
eliminating the majority of the host polling time (see
TMS varies with the configurations of Burst Length (see
Section 5.13 on page
Example, with mains sync:
The value calculated for TMS needs to be rounded up to the nearest multiple of the mains
periods before proceeding with the rest of the calculation. Continuing with the above example,
TMS = ((8 + 1 + (5-1)) * 1 ms) = 13 ms.
Rounded up to a multiple of whole mains periods, this becomes 20 ms (assuming a mains
frequency of 50Hz).
The worst case response time is then computed as:
Tr = (20 ms *2) + 10 ms = 50 ms
An X line is considered enabled if any key on that X line is enabled. An X line is disabled if all
keys on that X line are disabled.
• the burst spacing
• the number of enabled X lines
• the detect integrator settings
• Mains Sync
• and the serial polling rate by the host microcontroller
• NXE = Number of X lines enabled = 8
• NDIL = Norm detect integrator limit = 2
• FDIL = Fast detect integrator limit = 5
• BS = Burst spacing = 1 ms
• FMEA = FMEA test slot = 1
• HPR = Host polling rate = 10 ms
• TMS = Time to perform one Matrix Scan
46), and should be measured using an oscilloscope.
(Section 5.5 on page
(Section 5.5 on page
Section 5.20 on page
42)
42)
Section 5.9 on page
49).
44) and Dwell (see
9621B–AT42–06/11