at42qt1481 ATMEL Corporation, at42qt1481 Datasheet - Page 32

• Manufacturer Part Number: at42qt1481
• Description: 48-key Qmatrix Ic
• Manufacturer: ATMEL Corporation

4.11
4.12
4.13
4.14
4.15
4.16
32
EEPROM CRC – 0x0E
Return Last Command – 0x0F
Internal Code – 0x10
Internal Code – 0x13
Sleep – 0x16
Data Set for One Key – 0x4k
AT42QT1481
This command returns the 16-bit CRC calculated on the set-ups block and is sent back LSByte
first. The CRC sent back is the same CRC that is appended to the end of the Setups block.
No CRC is appended to the response.
This command returns the last received command character, in 1’s complement (inverted). If the
command is repeated twice or more, it returns the inversion of 0x0F, which is 0xF0.
If a prior command was not valid or was corrupted, it returns the bad command as well.
No CRC is appended to the response.
This command returns an internal code, as a value from 0 – 255.
A 16-bit CRC is appended to the response. This CRC folds in the command 0x10 itself initially.
This command returns an internal code as a value from 0 – 255.
A 16-bit CRC is appended to the response; this CRC folds in the command 0x13 itself initially.
The QT1481 replies with the character 0xE9 before setting an internal flag to indicate that low
power sleep mode has been requested. The flag does not force the QT1481 to sleep
immediately but requests the QT1481 to sleep at the end of each matrix scan whenever
possible. Sleep must also be enabled in Setups (see
command has no effect.
The internal flag is cleared upon receipt of any valid command except command 0x16, but the
QT1481 must already be awake in order to receive the command. The QT1481 is awake for at
least one keyscan cycle time after a wake-up pulse at the WS pin. To cancel the internal sleep
request flag, issue a wake-up pulse at the WS pin and then send any valid command other than
0x16 within one matrix scan cycle. The matrix scan cycle time is dependent on a number of
Setups parameters and should be measured using an oscilloscope.
See
Returns the data set for key k, where k = 0 – 47. To form this command, the key number is
logical-OR’d into the byte 0x40. This command returns 5 data bytes, plus two CRC bytes, in the
sequence:
Signal and Reference are returned LSByte first.
A 16-bit CRC is appended to the response. This CRC folds in the command 0x4k itself initially.
Section 2.16 on page 16
Signal
Reference
Normal Detect Integrator
for details of the sleep behavior.
2 bytes
2 bytes
1 byte
Section 5 on page
39), otherwise this
9621B–AT42–06/11