at42qt1481 ATMEL Corporation, at42qt1481 Datasheet - Page 48

• Manufacturer Part Number: at42qt1481
• Description: 48-key Qmatrix Ic
• Manufacturer: ATMEL Corporation

5.17
5.18
5.19
48
Serial Rate – SR
Lower Signal Limit – LSL
Key Gain Test Threshold – KGTT
AT42QT1481
For example, with NDRIFT and PDRIFT configured such that drift compensation occurs once
every second when the QT1481 is awake, and with the QT1481 being awake for 5 ms to scan
the matrix before falling asleep for 495 ms, all internal timers are slowed by a factor of 100
(5/500), and drift compensation would occur at the much slower rate of just once every 100s.
This would typically result in the key references not tracking signal variations adequately, and
could result in false detections. To help resolve this, SDC can be configured so that the QT1481
performs drift compensation after a specific number of sleeps.
This function is programmed on a global basis. See
SDC Default value: 0 (off, Sleep disabled)
SDC Possible range: 0 – 7 (off, 1 – 64)
The possible baud rates are shown in
only affects UART mode. SPI mode is slave-only and can clock at any rate from DC up to
4 MHz. The baud rate can be adjusted to one of five values from 9600 to 115.2 kbaud.
SR Default value:
This Setup determines the lowest acceptable value of signal level for all keys. If any key’s
reference level falls below this value, the QT1481 declares an error condition in the key status
bits (See
Testing is required to ensure that there are adequate margins in this determination. Key size,
shape, panel material, burst length, and dwell time all factor into the detected signal levels.
This parameter occupies 2 bytes (11 bits) of the setups table; address 291 holds the LSByte,
address 292 the MSByte.
LSL Default value:
LSL Possible range:
The Key Gain test takes a special sample from each enabled key using half the usual burst
length, and compares the resulting signal against each key's reference. The test passes if the
signal has decreased by the Key Gain Test Threshold (KGTT). The following equation must hold
for the test to pass:
Disabled keys are not tested.
The Key Gain Test Threshold can be configured to a value between 4 and 64, via LUT (see
Table 5-8 on page
Limit.
• With SDC = 0, sleep is disabled
• With SDC = 1, drift compensation occurs after every sleep
• With SDC = 7, drift compensation is applied after every sixty-four sleeps
Section 4.7 on page 28
(Key Reference – Test Signal ) >= KGTT
58). KGTT occupies 4 bits only, sharing the same word as the Lower Signal
0 (9600 baud)
100 (recommended value)
0 – 2047
and
Section 4.9 on page
Table 5-7 on page
Table 5-8 on page
57. The rate chosen by this parameter
31).
58.
9621B–AT42–06/11