at91sam9g45 ATMEL Corporation, at91sam9g45 Datasheet - Page 33

• Manufacturer Part Number: at91sam9g45
• Description: At91 Arm Thumb-based Microcontrollers
• Manufacturer: ATMEL Corporation

8.7
6438CS–ATARM–13-Oct-09
Power Management Controller
The Power Management Controller provides all the clock signals to the system.
PMC input clocks:
PMC output clocks
Note:
This allows the software control of five flexible operating modes:
• Switch from 32768 Hz oscillator to internal RC oscilllator by setting the bit OSCSEL to 0.
• Wait 5 slow clock cycles for internal resynchronization.
• Disable the 32768Hz oscillator by setting the bit OSC32EN to 0.
• UPLLCK: From UTMI PLL
• PLLACK From PLLA
• SLCK: slow clock from OSC32K or internal RC OSC
• MAINCK: from 12 MHz external oscillator
• Processor Clock PCK
• Master Clock MCK, in particular to the Matrix and the memory interfaces. The divider can be
• DDR system clock equal to 2xMCK
• USB Host EHCI High speed clock (UPLLCK)
• USB OHCI clocks (UHP48M and UHP12M)
• Independent peripheral clocks, typically at the frequency of MCK
• Two programmable clock outputs: PCK0 and PCK1
• Normal Mode, processor and peripherals running at a programmable frequency
• Idle Mode, processor stopped waiting for an interrupt
• Slow Clock Mode, processor and peripherals running at low frequency
• Standby Mode, mix of Idle and Backup Mode, peripheral running at low frequency, processor
• Backup Mode, Main Power Supplies off, VDDBU powered by a battery
1,2,3 or 4
stopped waiting for an interrupt
DDR system clock is not available when Master Clock (MCK) equals Processor Clock (PCK).
AT91SAM9G45
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