at91sam9g45 ATMEL Corporation, at91sam9g45 Datasheet - Page 35

• Manufacturer Part Number: at91sam9g45
• Description: At91 Arm Thumb-based Microcontrollers
• Manufacturer: ATMEL Corporation

8.7.1.3
8.8
8.9
8.10
8.11
8.12
8.13
6438CS–ATARM–13-Oct-09
Periodic Interval Timer
Watchdog Timer
Real-Time Timer
Real Time Clock
General-Purpose Backup Registers
Advanced Interrupt Controller
No UDP HS, UHP FS and DDR2 Mode
• Only PLLA is running at 384 MHz, UPLL power consumption is saved
• USB Device High Speed and Host EHCI High Speed operations are NOT allowed
• Full Speed OHCI input clock is PLLACK, USBDIV is 7 (division by 8)
• System Input clock is PLLACK, PCK is 384 MHz
• MDIV is ‘11’, MCK is 128 MHz
• DDR2 can be used at up to 128 MHz
• Includes a 20-bit Periodic Counter, with less than 1µs accuracy
• Includes a 12-bit Interval Overlay Counter
• Real Time OS or Linux/WinCE compliant tick generator
• 16-bit key-protected only-once-Programmable Counter
• Windowed, prevents the processor to be in a dead-lock on the watchdog access
• Real-Time Timer, allowing backup of time with different accuracies
• Low power consumption
• Full asynchronous design
• Two hundred year calendar
• Programmable Periodic Interrupt
• Alarm and update parallel load
• Control of alarm and update Time/Calendar Data In
• Four 32-bit backup general-purpose registers
• Controls the interrupt lines (nIRQ and nFIQ) of the ARM Processor
• Thirty-two individually maskable and vectored interrupt sources
– 32-bit Free-running back-up Counter
– Integrates a 16-bit programmable prescaler running on slow clock
– Alarm Register capable to generate a wake-up of the system through the Shut Down
– Source 0 is reserved for the Fast Interrupt Input (FIQ)
– Source 1 is reserved for system peripherals (PIT, RTT, PMC, DBGU, etc.)
– Programmable Edge-triggered or Level-sensitive Internal Sources
– Programmable Positive/Negative Edge-triggered or High/Low Level-sensitive
Controller
AT91SAM9G45
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