at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 208

• Manufacturer Part Number: at91rm3400
• Description: Atmel Advanced At91 Arm Microcontroller
• Manufacturer: ATMEL Corporation

Synchronous Data
Output
Multi Drive Control
(Open Drain)
Output Line
Timings
208
AT91RM3400
The level driven on an I/O line can be determined by writing in PIO_SODR (Set Output Data
Register) and PIO_CODR (Clear Output Data Register). These write operations respectively
set and clear PIO_ODSR (Output Data Status Register), which represents the data driven on
the I/O lines. Writing in PIO_OER and PIO_ODR manages PIO_OSR whether the pin is con-
figured to be controlled by the PIO controller or assigned to a peripheral function. This enables
configuration of the I/O line prior to setting it to be managed by the PIO Controller.
Similarly, writing in PIO_SODR and PIO_CODR effects PIO_ODSR. This is important as it
defines the first level driven on the I/O line.
Using the write operations in PIO_SODR and PIO_CODR can require that several instructions
be executed in order to define values on several bits. Both clearing and setting I/O lines on an
8-bit port, for example, cannot be done at the same time, and thus might limit the application
covered by the PIO Controller.
To avoid these inconveniences, the PIO Controller features a Synchronous Data Output to
clear and set a number of I/O lines in a single write. This is performed by authorizing the writ-
ing of PIO_ODSR (Output Data Status Register) from the register set PIO_OWER (Output
Write Enable Register), PIO_OWDR (Output Write Disable Register) and PIO_OWSR (Output
Write Status Register). The value of PIO_OWSR register is user-definable by writing in
PIO_OWER and PIO_OWDR. It is used by the PIO Controller as a PIO_ODSR write authori-
zation mask. Authorizing the write of PIO_ODSR on a user-definable number of bits is
especially useful, as it guarantees that the unauthorized bit will not be changed when writing it
and thus avoids the need of a time consuming read-modify-write operation.
After reset, the synchronous data output is disabled on all the I/O lines as PIO_OWSR resets
at 0x0.
Each I/O can be independently programmed in Open Drain by using the Multi Drive feature.
This feature permits several drivers to be connected on the I/O line which is driven low only by
each device. An external pull-up resistor (or enabling of the internal one) is generally required
to guarantee a high level on the line.
The Multi Drive feature is controlled by PIO_MDER (Multi-driver Enable Register) and
PIO_MDDR (Multi-driver Disable Register). The Multi Drive can be selected whether the I/O
line is controlled by the PIO controller or assigned to a peripheral function. PIO_MDSR (Multi-
driver Status Register) indicates the pins that are configured to support external drivers.
After reset, the Multi Drive feature is disabled on all pins, i.e. PIO_MDSR resets at value 0x0.
Figure 68 shows how the outputs are driven either by writing PIO_SODR or PIO_CODR, or by
directly writing PIO_ODSR. This last case is valid only if the corresponding bit in PIO_OWSR
is set. Figure 68 also shows when the feedback in PIO_PDSR is available.
1790A–ATARM–11/03