at91rm3400 ATMEL Corporation, at91rm3400 Datasheet - Page 406

• Manufacturer Part Number: at91rm3400
• Description: Atmel Advanced At91 Arm Microcontroller
• Manufacturer: ATMEL Corporation

Using Endpoints With
Ping-pong Attributes
406
AT91RM3400
During isochronous transfer, using an endpoint with ping-pong attributes is necessary. To be
able to guarantee a constant bandwidth, the microcontroller must read the previous data pay-
load sent by the host, while the current data payload is received by the USB device. Thus two
banks of memory are used. While one is available for the microcontroller, the other one is
locked by the USB device.
Figure 169. Bank Swapping in Data OUT Transfers for Ping-pong Endpoints
When using a ping-pong endpoint, the following procedures are required to perform Data OUT
transactions:
1. The host generates a Data OUT packet.
2. This packet is received by the USB device endpoint. It is written in the endpoint’s FIFO
3. The USB device sends an ACK PID packet to the host. The host can immediately send
4. The microcontroller is notified that the USB device has received a data payload, polling
5. The number of bytes available in the FIFO is made available by reading RXBYTECNT
6. The microcontroller transfers out data received from the endpoint’s memory to the
7. The microcontroller notifies the USB peripheral device that it has finished the transfer
8. A third Data OUT packet can be accepted by the USB peripheral device and copied in
9. If a second Data OUT packet has been received, the microcontroller is notified by the
Bank 0.
a second Data OUT packet. It is accepted by the device and copied to FIFO Bank 1.
RX_DATA_BK0 in the endpoint’s USB_CSRx register. An interrupt is pending for this
endpoint while RX_DATA_BK0 is set.
in the endpoint’s USB_CSRx register.
microcontroller’s memory. Data received is made available by reading the endpoint’s
USB_FDRx register.
by clearing RX_DATA_BK0 in the endpoint’s USB_CSRx register.
the FIFO Bank 0.
flag RX_DATA_BK1 set in the endpoint’s USB_CSRx register. An interrupt is pending
for this endpoint while RX_DATA_BK1 is set.
1 st Data Payload
2 nd Data Payload
3 rd Data Payload
Microcontroller
Write and Read at the Same Time
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Write
USB Device
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Bank 0
Endpoint 1
Read
USB Bus
2 nd Data Payload
3 rd Data Payload
1 st Data Payload
Data IN Packet
Data IN Packet
Data IN Packet
1790A–ATARM–11/03