PF38F5070M0P0B NUMONYX [Numonyx B.V], PF38F5070M0P0B Datasheet - Page 47

• Manufacturer Part Number: PF38F5070M0P0B
• Description: Numonyx Wireless Flash Memory (W18)
• Manufacturer: NUMONYX [Numonyx B.V]

Numonyx™ Wireless Flash Memory (W18)
8.4.2
8.5
November 2007
Order Number: 290701-18
will not occur because the flash memory may be providing status information instead of
array data. To allow proper CPU/flash initialization at system reset, connect RST# to
the system CPU RESET# signal.
System designers must guard against spurious writes when VCC voltages are above
V
signal to V
protection because alteration of memory contents can only occur after successful
completion of the two-step command sequences. The device is also disabled until RST#
is brought to V
(RST# connected to system PowerGood) during power-up/down, invalid bus conditions
during power-up can be masked, providing yet another level of memory protection.
VCC, VPP, and RST# Transitions
The CUI latches commands issued by system software and is not altered by VPP or CE#
transitions or WSM actions. Read-array mode is its power-up default state after exit
from reset mode or after VCC transitions above V
completing program or block erase operations (even after VPP transitions below V
the Read Array command must reset the CUI to read-array mode if flash memory array
access is desired.
Power Supply Decoupling
When the device is accessed, many internal conditions change. Circuits are enabled to
charge pumps and switch voltages. This internal activity produces transient noise. To
minimize the effect of this transient noise, device decoupling capacitors are required.
Transient current magnitudes depend on the device outputs’ capacitive and inductive
loading. Two-line control and proper decoupling capacitor selection suppresses these
transient voltage peaks. Each flash device should have a 0.1 µF ceramic capacitor
connected between each power (VCC, VCCQ, VPP)
High-frequency, inherently low-inductance capacitors should be as close as possible to
package signals.
LKO
. Because both WE# and CE# must be low for a command write, driving either
IH
inhibits writes to the device. The CUI architecture provides additional
IH
, regardless of its control input states. By holding the device in reset
LKO
,
and ground (VSS, VSSQ) signal.
(Lockout voltage). After
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),
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