PCI-MT32-XP-N2 Lattice, PCI-MT32-XP-N2 Datasheet - Page 26

• Manufacturer Part Number: PCI-MT32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Master/Target 32B
• Manufacturer: Lattice

Specifications of PCI-MT32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
Table 2-10. Customer Specific Parameters
IPUG18_09.2, November 2010
Table 2-10
NOTE: There is a GUI provided with this PCI IP for the purpose of selecting the core’s parameter values. Once
installed into Lattice’s Diamond or ispLEVER software design tools, the GUI can be accessed through the IPex-
press™ tool. The GUI provides a range checking routine that ensures the selected values are within the core’s
valid range. If the user configures this PCI IP core outside of the GUI flow, it is the user’s responsibility to ensure
that the parameter values are within the valid ranges shown in
range will cause the PCI IP core to function improperly. The recommended flow is to follow example 2 above and
use the PCI GUI to generate the params.v file. The name of this generated output file is fixed at “PCI_params.v”.
The user can find this file in the same directory where the <modulename>.lpc file is generated. Then, to prevent
from overwriting the PCI_params.v file, the user should save a copy that is renamed to match the <module-
name>.lpc file.
vdr_id_p
dev_id_p
subs_vdr_id_p
subs_id_p
Configuration
Port Inputs
endmodule
Space
customer_design_instantiation(
pci_core
para_cfg
shows the parameter signals and associated define values in PCI_params.v.
VENDOR_ID_g
DEVICE_ID_g
SUB_VENDOR_ID_g
SUB_SYSTEM_ID_g
Corresponding Parameter
Name in PCI_params.v
core_inst(
.xxxx(xxxx),
.yyyy(yyyy),
…………….
.zzzz(zzzz)
;
. framen(framen),
…
. vdr_id_p (vdr_id),
…
. dev_tim_p (dev_tim),
…
);
…
. dev_tim_p (dev_tim),
…
);
para_cfg_inst(.vdr_id_p (vdr_id),
0 - 0xFFFE
0 - 0xFFFF
0 - 0xFFFF
0 - 0xFFFF
Range
26
//vendor_id = VENDOR_ID_g
//devsel_timing = DEVSEL_TIMING_g
Table
Default
0x0000
0x0000
0x0000
0x0000
2-10. Parameters that are outside of the valid
Value of the Vendor ID field in the Configura-
tion Space. This sets the lower 16 bits of
address 00h.
Value of the Device ID field in the Configura-
tion Space. This sets the upper 16 bits of
address 00h.
Value for Subsystem Vendor ID field in the
Configuration Space. The Subsystem Vendor
ID is at the lower 16 bits of register location
2Ch.
Value for Subsystem ID field in the Configu-
ration Space. The Subsystem ID is located in
the upper 16 bits of address 2Ch.
Functional Description
Description
PCI IP Core User’s Guide