PCI-MT32-XP-N2 Lattice, PCI-MT32-XP-N2 Datasheet - Page 84

• Manufacturer Part Number: PCI-MT32-XP-N2
• Description: FPGA - Field Programmable Gate Array PCI Master/Target 32B
• Manufacturer: Lattice

Specifications of PCI-MT32-XP-N2

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Table 2-29. 32-bit Target Single Read Transaction with a 32-Bit Local Interface
CLK
1
2
3
4
5
6
7
8
Turn around
Turn around
PCI Data
Address
Phase
Data 1
Wait
Wait
Wait
Idle
The master asserts framen and drives ad[31:0] and cben[3:0].
The master tri-states the ad[31:0] lines and drives the byte enables cben[3:0]. If the master is
ready to receive single data, it asserts irdyn and de-asserts framen to indicate single data
phase transaction.
The PCI IP core starts to decode the address and command It also registers and drives the
lt_address_out lt_command_out to the back end.
If there is an address match, the Core drives the bar_hit signals to the back-end. It also asserts
lt_accessn. The back-end can use the bar_hit signals as a chip select.
With the device select timing set to Slow, the Core asserts devseln one clock after bar_hit. If
the back-end is ready to put data out on the next cycle, it can assert lt_rdyn. The local target can
insert wait states by not asserting lt_rdyn.
The Core’s Local Target Interface asserts lt_data_xfern since lt_rdyn was asserted the pre-
vious cycle. The back end drives the first DWORD (Data 1) on l_ad_in[31:0]. The Core
asserts lt_data_xfern to indicate that data from the back-end logic must be valid at this time in
order for the master to read the data correctly.
With lt_rdyn asserted during the previous two cycles the Core asserts trdyn and puts Data 1
on ad[31:0].
The master relinquishes control of framen and cben[3:0] and de-asserts irdyn since the data
transfer only requires one data phase.
The Core relinquishes control of ad[31:0] and de-asserts both devseln and trdyn.
The Core relinquishes control of devseln and trdyn.The Core also clears bar_hit, to signal to
the back end that the transaction is complete, and de-asserts lt_data_xfern.
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Description
Functional Description
PCI IP Core User’s Guide