ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 16

• Manufacturer Part Number: ADT7475ARQZ
• Description: IC REMOTE THERMAL CTRLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7475ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Single−Channel ADC Conversions
ADT7475 into single−channel ADC conversion mode. In
this mode, the ADT7475 can be made to read a single
temperature channel only. The appropriate ADC channel is
selected by writing to Bits [7:5] of the TACH1 minimum
high byte register (0x55).
Configuration Register 2 (0x73)
Bit 4 = 1, averaging off.
Bit 6 = 1, single−channel convert mode.
TACH1 Minimum High Byte Register ( 0x55)
Bits [7:5] select the ADC channel for single−channel
convert mode.
Overtemperature Events
channels can be detected and dealt with automatically in
automatic fan speed control mode. Register 0x6A to
Register 0x6C are the THERM temperature limit registers.
When a temperature exceeds its THERM temperature limit,
all PWM outputs run at the maximum PWM duty cycle
(Register 0x38, Register 0x39, and Register 0x3A).
This effectively runs the fans at the fastest allowed speed.
below THERM minus hysteresis. This can be disabled by
setting the boost bit in Configuration Register 3 (0x78),
Bit 2. The hysteresis value for the THERM temperature
limit is the value programmed into Register 0x6D and
Register 0x6E (hysteresis registers). The default hysteresis
value is 4°C.
Table 6. Conversion Time with Averaging Enabled
Table 7. Programming Single−Channel ADC Mode for
Temperatures
Setting Bit 6 of Configuration Register 2 (0x73) places the
Overtemperature events on any of the temperature
The fans run at this speed until the temperature drops
Register 0x55, Bits [7:5]
THERM LIMIT
TEMPERATURE
FANS
Remote Temperature 1
Remote Temperature 2
Figure 23. THERM Temperature Limit Operation
Local Temperature
Voltage Channels
Channel
101
110
111
100%
Channel Selected
Remote 1 Temperature
Local Temperature
Remote 2 Temperature
Measurement Time (ms)
HYSTERESIS (5C)
39
39
12
11
http://onsemi.com
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using Bits [7:5] of Configuration Register 5 (0x7C).
THERM can also be disabled by:
•
•
Limits, Status Registers, and Interrupts
Limit Values
ADT7475 are high and low limits. These can form the basis of
system status monitoring; a status bit can be set for any
out−of−limit condition and detected by polling the device.
Alternatively, SMBALERT interrupts can be generated to flag
out−of−limit conditions to a processor or microcontroller.
8−Bit Limits
Voltage Limit Registers
Register 0x46, V
Register 0x47, V
Register 0x48, V
Register 0x49, V
Temperature Limit Registers
Register 0x4E, Remote 1 Temperature Low Limit = 0x81
default
Register 0x4F, Remote 1 Temperature High Limit = 0x7F
default
Register 0x6A, Remote 1 THERM Temperature
Limit = 0x64 default
Register 0x50, Local Temperature Low Limit = 0x81
default
Register 0x51, Local Temperature High Limit = 0x7F
default
Register 0x6B, Local THERM Temperature Limit = 0x64
default
Register 0x52, Remote 2 Temperature Low Limit = 0x81
default
Register 0x53, Remote 2 Temperature High Limit = 0x7F
default
Register 0x6C, Remote 2 THERM Temperature
Limit = 0x64 default
THERM Limit Register
Register 0x7A, THERM Timer Limit = 0x00 default
16−Bit Limits
TACH limits are also 16 bits, consisting of a high byte and
low byte. Because fans running under speed or stalled are
normally the only conditions of interest, only high limits
exist for fan TACHs. Because the fan TACH period is
THERM can be disabled on specific temperature channels
Associated with each measurement channel on the
The following is a list of 8−bit limits on the ADT7475.
The fan TACH measurements are 16−bit results. The fan
In Offset 64 mode, writing −64°C to the appropriate
THERM Temperature Limit.
In twos complement mode, writing −128°C to the
appropriate THERM Temperature Limit.
CCP
CCP
CC
CC
Low Limit = 0x00 default
High Limit = 0xFF default
Low Limit = 0x00 default
High Limit = 0xFF default