ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 21

IC REMOTE THERMAL CTRLR 16-QSOP

ADT7475ARQZ

Manufacturer Part Number
ADT7475ARQZ
Description
IC REMOTE THERMAL CTRLR 16-QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of ADT7475ARQZ

Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 0.5 C
Digital Output - Bus Interface
Serial (3-Wire, 4-Wire)
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Configuring the THERM Pin as an Output
ADT7475 can optionally drive THERM low as an output. In
cases where PROCHOT is bidirectional, THERM can be
used to throttle the processor by asserting PROCHOT. The
user can pre−program system−critical thermal limits. If the
temperature exceeds a thermal limit by 0.25°C, THERM
asserts low. If the temperature is still above the thermal limit
on the next monitoring cycle, THERM stays low. THERM
remains asserted low until the temperature is equal to or
below the thermal limit. Because the temperature for that
channel is measured only once for every monitoring cycle,
after THERM asserts, it is guaranteed to remain low for at
least one monitoring cycle.
Remote 1, local, or Remote 2 THERM temperature limit is
exceeded by 0.25°C. The THERM temperature limit
registers are at Register 0x6A, Register 0x6B, and Register
0x6C. Setting Bit 3 of Register 0x5F, Register 0x60, and
Register 0x61 enables the THERM output feature for the
Remote 1, local, and Remote 2 temperature channels,
respectively. Figure 29 shows how the THERM pin asserts
low as an output in the event of a critical over temperature.
the THERM temperature limit to 64°C or less in Offset 64
mode, or 128°C or less in twos complement mode; that is, for
THERM temperature limit values less than 64°C or 128°C,
respectively, THERM is disabled.
Figure 29. Asserting THERM as an Output, Based on
In addition to monitoring THERM as an input, the
The THERM pin can be configured to assert low if the
An alternative method of disabling THERM is to program
THERM LIMIT
THERM LIMIT
TEMP
THERM
0.255C
performance is degrading significantly because
THERM is asserting more frequently on an hourly
basis.
Alternatively, OS− or BIOS−level software can
time−stamp when the system is powered on. If an
SMBALERT is generated due to the THERM timer
limit being exceeded, another time−stamp can be
taken. The difference in time can be calculated for a
fixed THERM timer limit time. For example, if it
takes one week for a THERM timer limit of 2.914
seconds to be exceeded and the next time it takes
only one hour, this is an indication of a serious
degradation in system performance.
Tripping THERM Limits
MONITORING
CYCLE
http://onsemi.com
21
Enabling and Disabling THERM on Individual
Channels
combinations of temperature channels using Bits [7:5] of
Configuration Register 5 (0x7C).
THERM Hysteresis
THERM hysteresis.
(Bit 2 of Configuration Register 4, 0x7D), the THERM pin
does not assert low when a THERM event occurs. If
THERM hysteresis is disabled and THERM is disabled
(Bit 2 of Configuration Register 4, 0x7D, and assuming the
appropriate pin is configured as THERM), the THERM pin
asserts low when a THERM event occurs.
THERM output asserts as expected.
THERM Operation in Manual Mode
to full speed, unless Bit 3 of Configuration Register 6 (0x10)
is set to 1.
can be used to select PWM speed on THERM event (100%
or maximum PWM).
disable THERM events from affecting the fans.
Fan Drive Using PWM Control
control fan speed. This relies on varying the duty cycle (or
on/off ratio) of a square wave applied to the fan to vary the
fan speed. The external circuitry required to drive a fan using
PWM control is extremely simple. For 4−wire fans, the
PWM drive may need only a pullup resistor. In many cases,
the 4−wire fan PWM input has a built−in pullup resistor.
of low frequencies or a single high PWM frequency. The
low frequency options are usually used for 3−wire fans,
while the high frequency option is usually used with 4−wire
fans.
drive device required. The specifications of the MOSFET
depend on the maximum current required by the fan being
driven. Typical notebook fans draw a nominal 170 mA, so
SOT devices can be used where board space is a concern. In
desktops, fans can typically draw 250 mA to 300 mA each.
If several fans are driven in parallel from a single PWM
output or drive larger server fans, the MOSFET must handle
the higher current requirements.
have a gate voltage drive, V
to the PWM output pin. The MOSFET should also have a
low on resistance to ensure that there is not significant
voltage drop across the FET, which would reduce the
THERM can be enabled/disabled for individual or
Setting Bit 0 of Configuration Register 7 (0x11) disables
If THERM hysteresis is enabled and THERM is disabled
If THERM and THERM hysteresis are both enabled, the
In manual mode, THERM events do not cause fans to go
Additionally, Bit 3 of Configuration Register 4 (0x7D)
Bit 2 in Configuration Register 4 (0x7D) can be set to
The ADT7475 uses pulse−width modulation (PWM) to
The ADT7475 PWM frequency can be set to a selection
For 3−wire fans, a single N−channel MOSFET is the only
The only other stipulation is that the MOSFET should
GS
< 3.3 V, for direct interfacing

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