ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 53

• Manufacturer Part Number: ADT7475ARQZ
• Description: IC REMOTE THERMAL CTRLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7475ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. These registers become read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.
1. These registers become read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.
1. These registers become read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.
1. These registers become read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.
Table 37. XNOR Tree Test Enable Register
Table 38. Remote 1 Temperature Offset Register
Table 39. Local Temperature Offset Register
Table 40. Remote 2 Temperature Offset Register
Register Address
Register Address
Register Address
Register Address
0x6F
0x70
0x71
0x72
(Note 1)
(Note 1)
(Note 1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit Name
Bit Name
Bit Name
Bit Name
RES [7:1]
XEN [0]
[7:0]
[7:0]
[7:0]
XNOR tree test enable register.
If the XEN bit is set to 1, the device enters the XNOR
tree test mode. Clearing the bit removes the device from
the XNOR tree test mode.
Unused. Do not write to these bits.
Remote 1 temperature offset.
Allows a twos complement offset value to be
automatically added to or subtracted from the Remote 1
temperature reading. This is to compensate for any
inherent system offsets such as PCB trace resistance.
LSB value = 0.5°C.
Local temperature offset.
Allows a twos complement offset value to be
automatically added to or subtracted from the local
temperature reading. LSB value = 0.5°C.
Remote 2 temperature offset.
Allows a twos complement offset value to be
automatically added to or subtracted from the Remote 2
temperature reading. This is to compensate for any
inherent system offsets such as PCB trace resistance.
LSB value = 0.5°C.
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(Note 1)
53
Description
Description
Description
Description
Power−On Default
Power−On Default
Power−On Default
Power−On Default
0x00
0x00
0x00
0x00