ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 19

IC REMOTE THERMAL CTRLR 16-QSOP

ADT7475ARQZ

Manufacturer Part Number
ADT7475ARQZ
Description
IC REMOTE THERMAL CTRLR 16-QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of ADT7475ARQZ

Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 0.5 C
Digital Output - Bus Interface
Serial (3-Wire, 4-Wire)
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Assigning THERM Functionality to a Pin
SMBALERT, THERM, GPIO, and TACH4. The user
chooses the required functionality by setting Bit 0 and Bit 1
of Configuration Register 4 (0x7D).
(Bit 1, Configuration Register 3 (0x78)).
THERM as an Input
assertions on the THERM pin. This can be useful for
connecting to the PROCHOT output of a CPU to gauge
system performance.
THERM pin is driven low externally, the fans run at 100%.
The fans run at 100% for the duration of the time that the
THERM pin is pulled low. This is done by setting the
BOOST bit (Bit 2) in Configuration Register 3 (0x78) to 1.
This works only if the fan is already running, for example,
in manual mode when the current duty cycle is above 0x00
or in automatic mode when the temperature is above T
If the temperature is below T
manual mode is set to 0x00, pulling the THERM low
externally has no effect. See Figure 26 for more information.
Table 8. Configuring Pin 5 as SMBALERT Output
Table 9. Pin 9 Configuration
T
THERM
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS BELOW T
Configuration Register 3 (0x78)
Pin 9 on the ADT7475 has four possible functions:
Once Pin 9 is configured as THERM, it must be enabled
When THERM is configured as an input, the user can time
The user can also set up the ADT7475 so that, when the
MIN
Figure 26. Asserting THERM Low as an Input in
Bit 1
0
0
1
1
Automatic Fan Speed Control Mode
Register
Bit 0
MIN
0
1
0
1
.
THERM ASSERTED TO LOW AS AN INPUT:
FANS DO NOT GO TO 100% BECAUSE
TEMPERATURE IS ABOVE T
ARE ALREADY RUNNING.
MIN
[0] ALERT Enable = 1
or if the duty cycle in
SMBALERT
Function
THERM
Bit Setting
TACH4
GPIO
MIN
AND FANS
http://onsemi.com
MIN
.
19
THERM Timer
assertion time. For example, the THERM input can be
connected to the PROCHOT output of a Pentium 4 CPU to
measure system performance. The THERM input can also be
connected to the output of a trip point temperature sensor.
THERM input and stopped when THERM is un−asserted.
The timer counts THERM times cumulatively, that is, the
timer resumes counting on the next THERM assertion. The
THERM timer continues to accumulate THERM assertion
times until the timer is read (it is cleared on read) or until it
reaches full scale. If the counter reaches full scale, it stops at
that reading until cleared.
so that the Bit 0 is set to 1 on the first THERM assertion. Once
the cumulative THERM assertion time has exceeded 45.52
ms, Bit 1 of the THERM timer is set and Bit 0 becomes the
LSB of the timer with a resolution of 22.76 ms, see Figure 27.
After a THERM timer read (Register 0x79), the following
happens:
the following happens:
The ADT7475 has an internal timer to measure THERM
The timer is started on the assertion of the ADT7475’s
The 8−bit THERM timer status register (0x79) is designed
When using the THERM timer, be aware of the following.
If the THERM timer is read during a THERM assertion,
1. The contents of the timer are cleared on read.
2. The F4P bit (Bit 5) of Interrupt Status Register 2
3. The contents of the timer are cleared.
4. Bit 0 of the THERM timer is set to 1 (because a
5. The THERM timer increments from zero.
6. If the THERM timer limit (Register 0x7A) = 0x00,
Figure 27. Understanding the THERM Timer
(REG. 0x79)
(REG. 0x79)
(REG. 0x79)
needs to be cleared (assuming that the THERM
timer limit has been exceeded).
THERM assertion is occurring).
the F4P bit is set.
THERM
THERM
THERM
THERM
THERM
THERM
TIMER
TIMER
TIMER
ACCUMULATE THERM LOW
ACCUMULATE THERM LOW
ASSERTION TIMES
ASSERTION TIMES
0 0 0
7 6 5
0 0 0
7 6 5
0 0 0
7 6 5
0
4
0
4
0
4
0 0 0 1
3 2 1 0
0 0 1 0
3 2 1 0
0 1 0 1
3 2 1 0
THERM ASSERTED ≥ 113.8ms
(91.04ms + 22.76ms)
THERM ASSERTED
THERM ASSERTED
3 22.76ms
≥ 45.52ms

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