ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 46

• Manufacturer Part Number: ADT7475ARQZ
• Description: IC REMOTE THERMAL CTRLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7475ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Bit 0 (STRT) of Configuration Register 1 (0x40) remains writable after the lock bit is set.
2. When monitoring is disabled, PWM outputs always go to 100% for thermal protection.
Table 19. Register 0x40 — Configuration Register 1 (Power−On Default = 0x04)
Table 20. Register 0x41 — Interrupt Status Register 1 (Power−On Default = 0x00)
Bit No.
Bit No.
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[1]
[2]
[4]
[5]
[6]
[7]
(Notes 1, 2)
Mnemonic
Mnemonic
FSPDIS
TODIS
LOCK
FSPD
STRT
V
RDY
RES
OOL
R1T
R2T
V
Vx1
CCP
LT
CC
Read−only
Read−only
Read−only
Read−only
Read−only
Read−only
Read−only
Once
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Logic 1 enables monitoring and PWM control outputs based on the limit settings programmed.
Logic 0 disables monitoring and PWM control based on the default powerup limit settings.
Note that the limit values programmed are preserved even if a Logic 0 is written to this bit and the
default settings are enabled. This bit does not become locked once Bit 1 (LOCK) has been set.
Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable registers
become read−only and cannot be modified until the ADT7475 is powered down and powered
up again. This prevents rogue programs such as viruses from modifying critical system limit
settings. This bit is lockable.
This bit is set to 1 by the ADT7475 to indicate only that the device is fully powered up and ready
to begin system monitoring.
When set to 1, this bit runs all fans at max speed as programmed in the PWM current duty
cycle registers (0x30 to 0x32). Power−on default = 0. This bit is not locked at any time.
BIOS should set this bit to a 1 when the ADT7475 is configured to measure current from the
controller and to measure the CPU’s core voltage. This bit allows monitoring software to display
CPU watts usage. This bit is lockable.
Logic 1 disables fan spin−up for two TACH pulses. Instead, the PWM outputs go high for the
entire fan spin−up timeout selected.
When this bit is set to 1, the SMBus timeout feature is disabled. This allows the ADT7475 to be
used with SMBus controllers that cannot handle SMBus timeouts. This bit is lockable.
Reserved.
V
read of the status register only if the error condition has subsided.
V
read of the status register only if the error condition has subsided.
R1T = 1 indicates that the Remote 1 low or high temperature has been exceeded. This bit is
cleared on a read of the status register only if the error condition has subsided.
LT = 1 indicates that the local low or high temperature has been exceeded. This bit is cleared
on a read of the status register only if the error condition has subsided.
R2T = 1 indicates that the Remote 2 low or high temperature has been exceeded. This bit is
cleared on a read of the status register only if the error condition has subsided.
OOL = 1 indicates that an out−of−limit event has been latched in Interrupt Status Register 2.
This bit is a logical OR of all status bits in Interrupt Status Register 2. Software can test this bit
in isolation to determine whether any of the voltage, temperature, or fan speed readings
represented by Interrupt Status Register 2 are out−of−limit, which saves the need to read
Interrupt Status Register 2 every interrupt or polling cycle.
CCP
CC
= 1 indicates that the V
= 1 indicates that the V
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CC
CCP
high or low limit has been exceeded. This bit is cleared on a
high or low limit has been exceeded. This bit is cleared on a
Description
Description