ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 44

• Manufacturer Part Number: ADT7475ARQZ
• Description: IC REMOTE THERMAL CTRLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7475ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. A THERM event always overrides any fan setting (even when fans are disabled).
2. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
1. This register becomes read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
1. If the extended resolution bits of these readings are also read, the extended resolution registers (Reg. 0x76, Reg. 0x77) must be read first.
2. V
1. These temperature readings can be in twos complement or Offset 64 format; this interpretation is determined by Bit 0 of Configuration
2. If the extended resolution bits of these readings are also read, the extended resolution registers (0x76 and 0x77) must be read first. Once
3. In twos complement mode, a temperature reading of −128°C (0x80) indicates a diode fault (open or short) on that channel.
4. In Offset 64 mode, a temperature reading of −64°C (0x00) indicates a diode fault (open or short) on that channel.
Table 12. Register 0x10 — Configuration Register 6 (Power−On Default = 0x00)
Table 13. Register 0x11 — Configuration Register 7 (Power−On Default = 0x00)
Table 14. Voltage Reading Registers (Power−On Default = 0x00)
Table 15. Temperature Reading Registers (Power−On Default = 0x80)
Bit No.
Bit No.
[5:4]
[7:1]
Register Address
Register Address
Once the extended resolution registers are read, the associated MSB reading registers are frozen until read. Both the extended resolution
registers and the MSB registers are frozen.
Register 5 (0x7C).
the extended resolution registers are read, all associated MSB reading registers are frozen until read. Both the extended resolution registers
and the MSB registers are frozen.
[0]
[1]
[2]
[3]
[6]
[7]
[0]
CC
(Pin 3) is the supply voltage for the ADT7475.
0x21
0x22
0x25
0x26
0x27
Mnemonic
Mnemonic
THERM in
ExtraSlow
Remote 1
Remote 2
Reserved
Reserved
V
THERM
Manual
SLOW
SLOW
SLOW
CCP
Local
Hys
Dis
Low
Read−only
Read−only
Read−only
Read−only
Read−only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
When this bit is set, Fan 1 smoothing times are multiplied x4 for Remote 1 temperature channel
(as defined in Register 0x62).
When this bit is set, Fan 2 smoothing times are multiplied x4 for local temperature channel (as
defined in Register 0x63).
When this bit is set, Fan 3 smoothing times are multiplied x4 for Remote 2 temperature channel
(as defined in Register 0x63).
When this bit is set, THERM is enabled in manual mode. (Note 1)
Reserved. Do not write to these bits.
V
drops below its V
When V
When this bit is set, all fan smoothing times are increased by a further 39.2%.
Setting this bit to 1 disables THERM hysteresis.
Reserved. Do not write to these bits
Reflects the voltage measurement at the V
Reflects the voltage measurement at the V
Remote 1 temperature readingP
Local temperature reading (8 MSBs of reading).
Remote 2 temperature reading (8 MSBs of reading).
CCP
Bit 1 in Interrupt Status Register 1 is set.
SMBALERT is generated, if enabled.
PROCHOT monitoring is disabled.
Everything is re−enabled once V
PROCHOT monitoring is enabled.
Fans return to their programmed state after a spin−up cycle.
LO = 1. When the power is supplied from 3.3 V STANDBY and the core voltage (V
CCP
increases above the low limit:
http://onsemi.com
CCP
low limit value (Register 0x46), the following occurs:
44
P
(8 MSBs of reading). (Notes 3 and 4)
CCP
(Notes 1 and 2)
increases above the V
Description
Description
Description
Description
(Notes 1 and 2)
CCP
CC
input on Pin 3 (8 MSBs of reading).
input on Pin 14 (8 MSBs of reading).
(Note 1)
(Notes 1 and 2)
CCP
low limit.
CCP
)