ADT7475ARQZ ON Semiconductor, ADT7475ARQZ Datasheet - Page 54

• Manufacturer Part Number: ADT7475ARQZ
• Description: IC REMOTE THERMAL CTRLR 16-QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7475ARQZ

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Full Temp Accuracy: +/- 0.5 C
• Digital Output - Bus Interface: Serial (3-Wire, 4-Wire)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. These registers become read−only when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.
1. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table 41. Register 0x73 — Configuration Register 2 (Power−On Default = 0x00)
Table 42. Register 0x74 — Interrupt Mask Register 1 (Power−On Default <7:0> = 0x00)
Table 43. Register 0x75 — Interrupt Mask Register 2 (Power−On Default <7:0> = 0x00)
Table 44. Register 0x76 — Extended Resolution Register 1
Bit No.
Bit No.
Bit No.
Bit No.
[0:3]
[3:2]
[5:4]
[4]
[5]
[6]
[7]
[1]
[2]
[4]
[5]
[6]
[7]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Mnemonic
Mnemonic
Mnemonic
Mnemonic
CONV
SHDN
ATTN
FAN1
FAN2
FAN3
V
V
RES
AVG
OOL
OVT
R1T
R2T
V
F4P
V
D1
D2
CCP
LT
CCP
CC
CC
Read−only
(Note 1)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Register 0x55, Bits [7:5]
Reserved.
AVG = 1, averaging on the temperature and voltage measurements is turned off. This allows
measurements on each channel to be made much faster.
ATTN = 1, the ADT7475 removes the attenuators from the V
used for other functions such as connecting up external sensors.
CONV = 1, the ADT7475 is put into a single−channel ADC conversion mode. In this mode, the
ADT7475 can be made to read continuously from one input only, for example, Remote 1
temperature. The appropriate ADC channel is selected by writing to Bits [7:5] of TACH1
minimum high byte register (0x55).
SHDN = 1, ADT7475 goes into shutdown mode. All PWM outputs assert low (or high depending
on state of the INV bit) to switch off all fans. The PWM current duty cycle registers read 0x00 to
indicate that the fans are not being driven.
V
V
R1T = 1, masks SMBALERT for out−of−limit conditions on the Remote 1 temperature channel.
LT = 1, masks SMBALERT for out−of−limit conditions on the local temperature channel.
R2T = 1, masks SMBALERT for out−of−limit conditions on the Remote 2 temperature channel.
OOL = 0, when one or more alerts are generated in Interrupt Status Register 2, assuming that
all the mask bits in the Interrupt Mask Register 2 (0x75) = 1, SMBALERT is still asserted.
OOL = 1, when one or more alerts are generated in Interrupt Status Register 2, assuming that
all the mask bits in the Interrupt Mask Register 2 (0x75) = 1, SMBALERT is not asserted.
OVT = 1, masks SMBALERT for overtemperature THERM conditions.
FAN1 = 1, masks SMBALERT for a Fan 1 fault.
FAN2 = 1, masks SMBALERT for a Fan 2 fault.
FAN3 = 1, masks SMBALERT for a Fan 3 fault.
F4P = 1, masks SMBALERT for a Fan 4 fault. If the TACH4 pin is being used as the THERM
input, this bit masks SMBALERT for a THERM timer event.
D1 = 1, masks SMBALERT for a diode open or short on a Remote 1 channel.
D2 = 1, masks SMBALERT for a diode open or short on a Remote 2 channel.
V
V
000
001
010
100
101
011
110
111
CCP
CC
CCP
CC
= 1, masks SMBALERT for out−of−limit conditions on the V
LSBs. Holds the 2 LSBs of the 10−bit V
= 1, masks SMBALERT for out−of−limit conditions on the V
LSBs. Holds the 2 LSBs of the 10−bit V
Reserved
V
V
Reserved
Reserved
Remote 1 temperature
Local temperature
Remote 2 temperature
CCP
CC
(3.3 V)
http://onsemi.com
54
(Note 1)
Description
Description
Description
Description
CC
CCP
measurement.
measurement.
CCP
CC
input. The V
CCP
channel.
channel.
CCP
input can be