ISL6567CRZ Intersil, ISL6567CRZ Datasheet - Page 11

IC CTLR PWM 2PHASE BUCK 24-QFN

ISL6567CRZ

Manufacturer Part Number
ISL6567CRZ
Description
IC CTLR PWM 2PHASE BUCK 24-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6567CRZ

Pwm Type
Voltage Mode
Number Of Outputs
1
Frequency - Max
1.5MHz
Duty Cycle
66%
Voltage - Supply
4.9 V ~ 5.5 V
Buck
Yes
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
No
Cuk
No
Isolated
No
Operating Temperature
0°C ~ 70°C
Package / Case
24-VQFN
Frequency-max
1.5MHz
Rohs Compliant
YES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Another benefit of interleaving is the reduction of input ripple
current. Input capacitance is determined in a large part by
the maximum input ripple current. Multi-phase topologies
can improve overall system cost and size by lowering input
ripple current and allowing the designer to reduce the cost of
input capacitance. The example in Figure 4 illustrates input
currents from a two-phase converter combining to reduce
the total input ripple current.
Figure 28, part of the section entitled “Input Capacitor
Selection” on page 26, can be used to determine the input
capacitor RMS current based on load current and duty cycle.
The figure is provided as an aid in determining the optimal
input capacitor solution.
PWM OPERATION
One switching cycle for the ISL6567 is defined as the time
between consecutive PWM pulse terminations (turn-off of
the upper MOSFET on a channel). Each cycle begins when
a switching clock signal commands the upper MOSFET to
go off. The other channel’s upper MOSFET conduction is
terminated 1/2 of a cycle later.
Once a channel’s upper MOSFET is turned off, the lower
MOSFET remains on for a minimum of 1/3 cycle. This forced
off time is required to assure an accurate current sample.
Following the 1/3-cycle forced off time, the controller enables
the upper MOSFET output. Once enabled, the upper
MOSFET output transitions high when the sawtooth signal
crosses the adjusted error-amplifier output signal, as
illustrated in Figure 2. Just prior to the upper drive turning
the MOSFET on, the lower MOSFET drive turns the
freewheeling element off. The upper MOSFET is kept on
until the clock signals the beginning of the next switching
cycle and the PWM pulse is terminated.
CURRENT SENSING
ISL6567 senses current by sampling the voltage across the
lower MOSFET during its conduction interval. MOSFET
FIGURE 4. INPUT CAPACITOR CURRENT AND INDIVIDUAL
C
CHANNEL CURRENTS IN A 2-PHASE
CONVERTER
IN
CURRENT
Q1 D-S CURRENT
11
Q3 D-S CURRENT
ISL6567
ISL6567
r
for load line regulation, channel current balance, module
current sharing, and overcurrent protection.
The ISEN pins are used as current inputs for each channel.
Internally, a virtual ground is created at the ISEN pins. The
R
ISEN pins, proportional to the lower MOSFETs’ r
voltage, during their conduction periods. The current thus
developed through the ISEN pins is internally averaged, then
the current error signals resulting from comparing the
average to the individual current signals are used for
channel current balancing.
Select the value for the R
temperature r
total converter output current, I
is also used for OC detection, ensure that at maximum
power train temperature rise and maximum output current
loading the OC protection is not inadvertently tripped. OC
protection current level through the ISEN pins is listed in the
“Electrical Specifications” table starting on page 5.
CHANNEL-CURRENT BALANCE
Another benefit of multi-phase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this, the
designer avoids the complexity of driving multiple parallel
MOSFETs and the expense of using expensive heat sinks
and exotic magnetic materials.
All things being equal, in order to fully realize the thermal
advantage, it is important that each channel in a multi-phase
converter be controlled to deliver about the same current at
any load level. Intersil’s ISL6567 ensure current balance by
comparing each channel’s current to the average current
delivered by both channels and making appropriate
adjustments to each channel’s pulse width based on the
resultant error. The error signal modifies the pulse width to
correct any unbalance and force the error toward zero.
Conversely, should a channel-to-channel imbalance be
desired, such imbalance can be created by adjusting the
individual channel’s R
where one phase of the converter is naturally carrying more
current than the other, or where one of the two phases is
subject to a more stringent thermal environment limiting its
current-carrying capability, are instances where this
adjustment is particularly useful, helping to cancel out the
design-intrinsic thermal or current imbalances.
SOFT-START
The soft-start function allows the converter to bring up the
output voltage in a controlled fashion, resulting in a linear
ramp-up. As soon as the controller is fully enabled for
R
DS(ON)
ISEN
ISEN
resistors are used to size the current flow through the
=
sensing is a no-added-cost method to sense current
---------------------- -
50 10
r
DS ON
×
(
DS(ON)
6
)
I
------- -
FL
2
of the lower MOSFETs and the full-load
ISEN
ISEN
resistor. Asymmetrical layouts,
FL
resistors based on the room
. As this current sense path
DS(ON)
May 28, 2009
FN9243.3
(EQ. 5)

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