ISL6567CRZ Intersil, ISL6567CRZ Datasheet - Page 7

• Manufacturer Part Number: ISL6567CRZ
• Description: IC CTLR PWM 2PHASE BUCK 24-QFN
• Manufacturer: Intersil

Specifications of ISL6567CRZ

• Pwm Type: Voltage Mode
• Number Of Outputs: 1
• Frequency - Max: 1.5MHz
• Duty Cycle: 66%
• Voltage - Supply: 4.9 V ~ 5.5 V
• Buck: Yes
• Boost: No
• Flyback: No
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: No
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 24-VQFN
• Frequency-max: 1.5MHz
• Rohs Compliant: YES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing Diagram
Functional Pin Description
VCC (Pin 8)
Bias supply for the IC’s small-signal circuitry. Connect this
pin to a 5V supply and locally decouple using a quality 0.1µF
ceramic capacitor. This pin is monitored for POR purposes.
VCC bias may be applied in the absence of PVCC bias.
PVCC (Pin 15)
Power supply pin for the MOSFET drives. Connect this pin to
a 5V supply and locally decouple using a quality 1µF
ceramic capacitor. This pin is monitored for POR purposes.
PVCC bias should not be applied in the absence of VCC
bias.
VREG (Pin 7)
This pin is the output of the internal shunt regulator. The
internal shunt regulator monitors and regulates the voltage
at the VCC pin. In applications where the chip bias,
(including that necessary to drive the external MOSFETs), is
below the current rating of this pin, connect it to VCC and
PVCC, then connect this node to the input supply via a
properly sized resistor. Should the input voltage vary over a
wide range and/or the bias current required exceed the
intrinsic capability of the on-board regulator, use this pin in
conjunction with an external NPN transistor and a couple of
resistors to create a more flexible bias supply for the
ISL6567. In any configuration, pay particular attention to the
chip’s limitations in terms of both current sinking capability of
the shunt regulator, as well as the internal power dissipation.
For more information, refer to “Bias Supply Considerations”
on page 17.
GND (Pin 25)
Connect this pad to the circuit ground using the shortest
possible path (one to four vias to the internal ground plane,
placed on the soldering pad are recommended). All internal
small-signal circuitry, as well as the lower gates’ return paths
are referenced to this pin.
UGATE
LGATE
t
PDHUGATE
7
t
FLGATE
t
RUGATE
ISL6567
ISL6567
REFTRK (Pin 24)
This pin represents an optional reference input, as well as a
clamp voltage for the internal reference. If utilizing the
ISL6567’s internal 0.6V reference, and desire no special
tracking features enabled, electrically connect this pin to the
VCC pin, or leave it open. Internal or external reference
operation mode is dictated by the MON pin.
While operating in internal reference mode, this pin
represents an internal reference clamp that can be used for
implementation of various tracking features. In this operating
mode, a small internal current is sourced on this pin, pulling it
high if left open.
If utilizing the ISL6567 in conjunction with an external
reference, connect the desired stimulus to this pin; the sensed
output of the ISL6567 converter follows this input.
While operating with an external reference, the power-good
and overvoltage protection functions are disabled while the
MON pin voltage is below its threshold (typically 300mV).
MON (Pin 3)
The status of this pin is checked every time the chip is
enabled or POR is released; should its potential be lower than
3.5V (typical), the REFTRK potential is assumed to be an
externally-provided reference and the ISL6567 proceeds to
regulate the sensed output voltage to this external reference.
When operating using the internal reference voltage, connect
this pin to VCC (to bypass the mechanism previously
described).
While operating with an externally-provided reference,
connect this pin to a properly-sized resistor divider off the
voltage to be monitored. PGOOD and OVP functions are
enabled when this pin exceeds its monitored threshold
(typically 300mV).
This pin is normally floating (high impedance input) until it
exceeds its detect threshold. Once the threshold is
exceeded, a small current is sourced on this pin; this current,
along with a properly sized resistor network, allows the user
to adjust the threshold hysteresis.
t
PDHLGATE
t
FUGATE
t
RLGATE
May 28, 2009
FN9243.3