DEMO9S08LC60 Freescale Semiconductor, DEMO9S08LC60 Datasheet - Page 11

• Manufacturer Part Number: DEMO9S08LC60
• Description: BOARD DEMO FOR 9S08LC60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08LC60

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08LC60
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08LC
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08LC60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section Number
6.1
6.2
7.1
Freescale Semiconductor
Pin Behavior in Stop Modes ............................................................................................................83
Parallel I/O Registers .......................................................................................................................83
Introduction .....................................................................................................................................95
5.8.3
5.8.4
5.8.5
5.8.6
5.8.7
5.8.8
5.8.9
5.8.10
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
7.1.1
7.1.2
7.1.3
System Background Debug Force Reset Register (SBDFR) ..........................................73
System Options Register (SOPT1) .................................................................................73
System Options Register (SOPT2) .................................................................................74
System Device Identification Register (SDIDH, SDIDL) ..............................................75
System Real-Time Interrupt Status and Control Register (SRTISC) .............................76
System Power Management Status and Control 1 Register (SPMSC1) .........................77
System Power Management Status and Control 2 Register (SPMSC2) .........................78
System Power Management Status and Control 3 Register (SPMSC3) .........................79
Port A Registers ..............................................................................................................83
6.2.1.1
6.2.1.2
Port A Control Registers ................................................................................................85
6.2.2.1
6.2.2.2
6.2.2.3
Port B Registers ..............................................................................................................87
6.2.3.1
6.2.3.2
Port B Control Registers .................................................................................................88
6.2.4.1
6.2.4.2
6.2.4.3
Port C Registers ..............................................................................................................90
6.2.5.1
6.2.5.2
Port C Control Registers .................................................................................................91
6.2.6.1
6.2.6.2
6.2.6.3
Features ...........................................................................................................................97
Modes of Operation ........................................................................................................97
7.1.2.1
7.1.2.2
7.1.2.3
Block Diagram ................................................................................................................97
Port A Data Registers (PTAD) ........................................................................84
Port A Data Direction Registers (PTADD) .....................................................84
Internal Pullup Enable (PTAPE) .....................................................................85
Output Slew Rate Control Enable (PTASE) ...................................................86
Output Drive Strength Select (PTADS) ..........................................................86
Port B Data Registers (PTBD) ........................................................................87
Port B Data Direction Registers (PTBDD) .....................................................88
Internal Pullup Enable (PTBPE) .....................................................................88
Output Slew Rate Control Enable (PTBSE) ...................................................89
Output Drive Strength Select (PTBDS) ..........................................................90
Port C Data Registers (PTCD) ........................................................................91
Port C Data Direction Registers (PTCDD) .....................................................91
Internal Pullup Enable (PTCPE) .....................................................................92
Output Slew Rate Control Enable (PTCSE) ...................................................93
Output Drive Strength Select (PTCDS) ..........................................................93
KBI in Wait Mode ...........................................................................................97
KBI in Stop Modes .........................................................................................97
KBI in Active Background Mode ...................................................................97
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Keyboard Interrupt (S08KBIV2)
Parallel Input/Output
Chapter 6
Chapter 7
Title
Page
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