DEMO9S08LC60 Freescale Semiconductor, DEMO9S08LC60 Datasheet - Page 126

BOARD DEMO FOR 9S08LC60

DEMO9S08LC60

Manufacturer Part Number
DEMO9S08LC60
Description
BOARD DEMO FOR 9S08LC60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheets

Specifications of DEMO9S08LC60

Contents
Evaluation Board
Processor To Be Evaluated
MC9S08LC60
Interface Type
RS-232, USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08LC
Rohs Compliant
Yes
For Use With/related Products
MC9S08LC60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 9 Liquid Crystal Display Driver (S08LCDV1)
Blinking functionality remains active in wait or stop3 mode. If the MCU is in wait or stop3, the LCDRAM
registers cannot be changed. Stop3 provides the lowest power consumption state where the LCD module
is functional.
9.1.3
Figure 9-2
126
BUS
IP
Mode
Stop3
Wait
is a block diagram of the LCD module.
Block Diagram
LCD DIGITAL
Depending on the state of the LCDSTP3 bit, the LCD module can operate an LCD panel in stop3 mode.
If LCDSTP3 = 1, LCD module clock generation is turned off and the LCD module enters a power
conservation state.If LCDSTP3 = 0, the LCD module can operate an LCD panel in stop3, and the LCD
module continues to display the current LCD panel contents base on the LCDRAM registers.
If the LCD is enabled in stop3, the ICGERCLK must be selected as the clock source since the bus clock
is not available in stop3.
Depending on the configuration, the LCD module can operate an LCD panel in wait mode. If LCDWAI = 1,
the LCD module clock generation is turned off and the LCD module enters a power conservation state.If
LCDWAI = 0, the LCD module can operate an LCD panel in wait, and the LCD module continues to
display the current LCD panel contents base on the LCDRAM registers.
lcd_ipbus_interface
MC9S08LC60 Series Data Sheet: Technical Data, Rev. 4
Table 9-2. Modes of Operation (continued)
Figure 9-2. LCD Driver Block Diagram
CONTROL
LCD CHARGE PUMP
lcd_regs
lcd_control
CLOCK INPUT
lcd_clkgen
Operation
LCD RAM
CLOCK
BASE
lcd_vgen
V
V
V
LL1
LL2
LL3
Freescale Semiconductor
FP/BP DRIVER
LCD

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