M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 185

BOARD EVAL FOR MC9S08GB60

M68EVB908GB60E

Manufacturer Part Number
M68EVB908GB60E
Description
BOARD EVAL FOR MC9S08GB60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of M68EVB908GB60E

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S08GB
Data Bus Width
8 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08GB
Kit Contents
GB60 Evaluation Kit
Rohs Compliant
Yes
For Use With/related Products
MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NEIE — Noise Error Interrupt Enable
FEIE — Framing Error Interrupt Enable
PEIE — Parity Error Interrupt Enable
11.10.7 SCI x Data Register (SCIxD)
This register is actually two separate registers. Reads return the contents of the read-only receive data
buffer and writes go to the write-only transmit data buffer. Reads and writes of this register are also
involved in the automatic flag clearing mechanisms for the SCI status flags.
Freescale Semiconductor
This bit enables the noise flag (NF) to generate hardware interrupt requests.
This bit enables the framing error flag (FE) to generate hardware interrupt requests.
This bit enables the parity error flag (PF) to generate hardware interrupt requests.
1 = Hardware interrupt requested when NF = 1.
0 = NF interrupts disabled (use polling).
1 = Hardware interrupt requested when FE = 1.
0 = FE interrupts disabled (use polling).
1 = Hardware interrupt requested when PF = 1.
0 = PF interrupts disabled (use polling).
Reset:
Read:
Write:
Bit 7
R7
T7
0
Figure 11-12. SCI x Data Register (SCIxD)
MC9S08GB/GT Data Sheet, Rev. 2.3
R6
T6
6
0
R5
T5
5
0
R4
T4
4
0
R3
T3
3
0
R2
T2
2
0
SCI Registers and Control Bits
R1
T1
1
0
Bit 0
R0
T0
0
185

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