M68EVB908GB60E Freescale Semiconductor, M68EVB908GB60E Datasheet - Page 81

• Manufacturer Part Number: M68EVB908GB60E
• Description: BOARD EVAL FOR MC9S08GB60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of M68EVB908GB60E

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S08GB
• Data Bus Width: 8 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08GB
• Kit Contents: GB60 Evaluation Kit
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08GB60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.4
Port D is an 8-bit port shared with the two TPM modules, TPM1 and TPM2, and general-purpose I/O.
When the TPM1 or TPM2 modules are enabled in output compare or input capture modes of operation,
the pin direction will be controlled by the module function.
Port D pins are available as general-purpose I/O pins controlled by the port D data (PTDD), data direction
(PTDDD), pullup enable (PTDPE), and slew rate control (PTDSE) registers. Refer to
I/O
The TPM2 module can be configured to use PTD7–PTD3 as either input capture, output compare, PWM,
or external clock input pins (PTD3 only). Refer to
information about using PTD7–PTD3 as timer pins.
The TPM1 module can be configured to use PTD2–PTD0 as either input capture, output compare, PWM,
or external clock input pins (PTD0 only). Refer to
information about using PTD2–PTD0 as timer pins.
6.3.5
Port E is an 8-bit port shared with the SCI1 module, SPI1 module, and general-purpose I/O. When the SCI
or SPI modules are enabled, the pin direction will be controlled by the module function.
Port E pins are available as general-purpose I/O pins controlled by the port E data (PTED), data direction
(PTEDD), pullup enable (PTEPE), and slew rate control (PTESE) registers. Refer to
I/O
When the SCI1 module is enabled, PTE0 serves as the SCI1 module’s transmit pin (TxD1) and PTE1
serves as the receive pin (RxD1). Refer to
for more information about using PTE0 and PTE1 as SCI pins.
When the SPI module is enabled, PTE2 serves as the SPI module’s slave select pin (SS1), PTE3 serves as
the master-in slave-out pin (MISO1), PTE4 serves as the master-out slave-in pin (MOSI1), and PTE5
serves as the SPI clock pin (SPSCK1). Refer to
more information about using PTE5–PTE2 as SPI pins.
Freescale Semiconductor
Controls”
Controls”
Port D
Port E
Port D, TPM1 and TPM2
Port E, SCI1, and SPI
for more information about general-purpose I/O control.
for more information about general-purpose I/O control.
MCU Pin:
MCU Pin:
TPM2CH4
PTD7/
PTE7
Bit 7
Bit 7
TPM2CH3
MC9S08GB/GT Data Sheet, Rev. 2.3
PTD6/
PTE6
Figure 6-5. Port D Pin Names
Figure 6-6. Port E Pin Names
6
6
Chapter 11, “Serial Communications Interface (SCI)
TPM2CH2
SPSCK1
PTD5/
PTE5/
Chapter 12, “Serial Peripheral Interface (SPI) Module
5
5
Chapter 10, “Timer/PWM (TPM)
Chapter 10, “Timer/PWM (TPM)
TPM2CH1
MOSI1
PTD4/
PTE4/
4
4
TPM2CH0
MISO1
PTD3/
PTE3/
3
3
TPM1CH2
PTD2/
PTE2/
SS1
2
2
TPM1CH1
PTD1/
PTE1/
RxD1
Section 6.4, “Parallel
Section 6.4, “Parallel
1
1
Module”
Module”
TPM1CH0
PTD0/
PTE0/
Pin Descriptions
TxD1
Bit 0
Bit 0
for more
for more
Module”
for
81