ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 35

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
ZLP12840 OTP MCU
Product Specification
29
8-bit addresses in the range F0h–FFh (and the equivalent 4-bit addresses) are bank-
independent, meaning they always access the control registers in Bank 0, regardless of the
RP[3:0] value. Addresses in the range 00h–03h always access the Bank 0 Port registers
unless Bank D or F is selected. (Port 01h is not implemented in this device.) When Bank D
or F is selected, addresses 10h–EFh access the Bank 0 general-purpose registers.
The LDX and LDXI instructions or indirect addressing can be used to access the
Bank 1–3 registers not accessible by 8-bit or working register addresses (12-bit addresses
100h–103h, 1F0h–1FFh, 200h–203h, 2F0h–2FFh, 300h–303h, and 3F0h–3FFh). See
Linear Memory Addressing
on page 32.
Stack
The Stack Pointer register (SPL) is Bank 0 register FFh. Operations that use the stack
pointer always addresses Bank 0, regardless of the RP[3:0] setting. For details on stack,
refer to Z8 LXM CPU Core User Manual (UM0183).
This device does not use a stack pointer high byte. Bank 0 register FEh can be used to
store user data, see
User Data Register
on page 36.
PS024410-0108
P R E L I M I N A R Y
Memory and Registers

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