ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 36

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
PS024410-0108
Ports 00h–03h
CPU Control
Registers
F0h–FFh
04h–EFh
Purpose
Bank 0
General
= Bank-Independent Address (Always Accesses Bank 0)
* Compiler’s default interrupt service routine working registers.
Figure 9. Register File 8-Bit Banked Address Map
Banks 1–3
Ports 00h–03h
CPU Control
F0h–FFh
Registers
04h–EFh
Purpose
General
CPU Control
F0h–FFh
CPU Control
F0h–FFh
P R E L I M I N A R Y
CPU Control
Registers
F0h–FFh
10h–EFh
Peripheral
Bank D
Purpose
General
00h–0Fh
Bank 0
Control
Product Specification
ZLP12840 OTP MCU
Memory and Registers
CPU Control
F0h–FFh
Registers
10h–EFh
Peripheral
Bank F
Purpose
General
00h–0Fh
Not to Scale
Bank 0
Control
30

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