ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 63

• Manufacturer Part Number: ZLP128ICE01ZEM
• Description: EMULATOR CRIMZON Z8 ZLP12840
• Manufacturer: Zilog

Specifications of ZLP128ICE01ZEM

• Interface Type: RS-232, Ethernet, USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3829

Table 26. Baud Rate Generator Constant Register (BCNST)
PS024410-0108
Bit
Position Value Description
[3]
[2]
[1]
[0]
Bit
Field
Reset
R/W
Address
Baud Rate Generator Constant Register
Note:
0
1
0
1
0
1
0
1
R/W
The UART baud rate generator determines the frequency at which UART data is received
and transmitted. This baud rate is determined by the following equation:
The system clock is usually the crystal clock divided by 2.
When the UART baud rate generator is used as an additional timer, a Read from this regis-
ter will return the actual value of the count of the BRG in progress and not the reload value
(Table
This register is not reset after a Stop Mode Recovery.
7
1
Even parity selected.
Odd parity selected.
No break is sent.
Send Break (force Tx output to 0).
One stop bit.
Two stop bits.
Baud Rate Generator—When the transmitter and receiver are disabled, the BRG can
be used as an additional timer. When setting this bit, clear bits [7:6] in this register. Also
set bit [5] if an interrupt is desired when the BRG is reloaded.
BRG used as Baud Rate Generator for UART.
BRG used as timer.
UART Data Rate bits/s
26).
R/W
6
1
(
R/W
Bank Independent: F4h; Linear: 0F4h
P R E L I M I N A R Y
5
1
Baud Rate Generator Constant
)
=
----------------------------------------------------------------------------------------------------------------------------------------- -
16 UART Baud Rate Divisor Value BCNST
R/W
×
4
1
System Clock Frequency Hz
R/W
3
1
R/W
Universal Asynchronous Receiver/
2
1
Product Specification
ZLP12840 OTP MCU
(
(
R/W
)
1
1
)
R/W
0
1
57