ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 91

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
Interrupts
PS024410-0108
Table 40. Interrupt Control Registers
The Crimzon
The interrupts are maskable and prioritized (see
divided as follows: three sources are claimed by Port 3 lines P33:P31, two by the counter/
timers and one for low-voltage detection. P32 and the UART receiver share the same
interrupt. Only one interrupt can be selected as a source. When the UART receiver is
enabled P32 is no longer used as an interrupt source. The UART transmit interrupt and
UART baud rate interrupt use the same interrupt as the P33 interrupt. You must select the
source that triggers the interrupt. When bit 7 of UTCL is 1, the UART transmit interrupt is
the source. When bit 7 of UCTL is 0 and bit 5 of UCTL is 1, the BRG interrupt is selected.
The Interrupt Mask Register (globally or individually) enables or disables the six interrupt
requests.
The source for IRQ1 is determined by bit 1 of the Port 3 Mode Register (P3M) and bit 4 of
the SMR4 register. If P3M[1]=0 (DIGITAL mode) and SMR4[4]=0, pin P33 is the IRQ1
source. If P3M[1]=1 (ANALOG mode) or SMR4[4]=1 (SMR interrupt enabled), the out-
put of the Stop Mode Recovery source logic is used as the source for the interrupt. See
Stop Mode Recovery Interrupt
12-Bit Bank 8-Bit
0F9
0FA
0FB
Address (Hex)
All
All
All
®
F9
FA
FB
ZLP12840 MCU features six different interrupts (see
Register
Description
Interrupt Priority
Register
Interrupt Request
Register
Interrupt Mask
Register
P R E L I M I N A R Y
on page 99.
IPR
IRQ
IMR
Mnemonic
Figure 31
Reset
XXh
00h
0XXX_XXXXb
on page 86). The six sources are
Product Specification
ZLP12840 OTP MCU
Page
No
90
92
89
Table 41
on page 87).
Interrupts
85

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