ZLP128ICE01ZEM Zilog, ZLP128ICE01ZEM Datasheet - Page 45

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ZLP128ICE01ZEM

Manufacturer Part Number
ZLP128ICE01ZEM
Description
EMULATOR CRIMZON Z8 ZLP12840
Manufacturer
Zilog

Specifications of ZLP128ICE01ZEM

Interface Type
RS-232, Ethernet, USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3829
Table 20. Register File Address Summary
Register File Summary
12-Bit
000
001
002
003
004–00F 0
010–0EF 0,D,F 10–EF General-Purpose Registers (Banks 0, D, F) —
0F0
0F1
0F2
0F3
0F4
0F5
0F6
0F7
0F8
0F9
0FA
PS024410-0108
Address (Hex)
Bank 8-Bit
0–3
0–3
0–3
0–3
All
All
All
All
All
All
All
All
All
All
All
Table 20
monic, and reset value. The table also lists the register bank (or banks) and corresponding
8-bit address, if any, for each register, plus a page link to the detailed register diagram.
Throughout this document, an “X” in a number denotes an undefined digit. A “—” (dash)
in a table cell indicates that the corresponding attribute does not apply to the listed item.
Reset value digits highlighted in grey are not reset by a Stop Mode Recovery. Register bit
SMR[7] (shown in boldface) is set to 1 instead of reset by a Stop Mode Recovery.
00
01
02
03
04–0F General-Purpose Registers (Bank 0 Only) —
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
FA
maps each linear (12-bit) register file address to the associated register, mne-
Port 0
Reserved
Port 2
Port 3
UART Receive/Transmit Data Register
UART Status Register
UART Control Register
UART Baud Rate Generator Constant
Reserved
Interrupt Priority Register
Interrupt Request Register
Register Description
Program Memory Paging Register
Port 2 Mode Register
Port 3 Mode Register
Port 0 Mode Register
P R E L I M I N A R Y
Mnemonic
P0
P2
P3
PMPR
URDATA/
UTDATA
UST
UCTL
BCNST
P2M
P3M
P01M
IPR
IRQ
Product Specification
ZLP12840 OTP MCU
Reset
XXh
XXh
0Xh
XXh
XXh
0 XXX_XXX0 b
XXh
0 0 0 0 _0 0 1 0 b
00h
FFh
FFh
XXXX_X0 0 0 b
X1 XX_XXX1 b
XXh
00h
Register File Summary
Page
No
21
23
25
34
54
55
56
57
22
24
20
90
92
39

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