PIC24HJ64GP502-E/MM Microchip Technology, PIC24HJ64GP502-E/MM Datasheet - Page 169

• Manufacturer Part Number: PIC24HJ64GP502-E/MM
• Description: IC PIC MCU FLASH 64K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP502-E/MM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

14.0
The input capture module is useful in applications
requiring frequency (period) and pulse measurement.
The PIC24HJ32GP302/304, PIC24HJ64GPX02/X04
and PIC24HJ128GPX02/X04 devices support up to
four input capture channels.
The input capture module captures the 16-bit value of
the selected Time Base register when an event occurs
at the ICx pin. The events that cause a capture event
are listed below in three categories:
1.
FIGURE 14-1:
© 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Simple Capture Event modes:
2: Some registers and associated bits
ICx pin
INPUT CAPTURE
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
of
PIC24HJ64GPX02/X04
PIC24HJ128GPX02/X04
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 12. “Input Capture”
(DS70248) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is avail-
able
(www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
from
the
INPUT CAPTURE BLOCK DIAGRAM
the
Falling Edge Mode
(16th Rising Edge)
Rising Edge Mode
(4th Rising Edge)
Prescaler Mode
PIC24HJ32GP302/304,
Prescaler Mode
Edge Detection
Wake-up Mode
Sleep/Idle
Microchip
Mode
families
website
and
101
100
011
010
Preliminary
001
ICM<2:0>
of
CaptureEvent
2.
3.
Each input capture channel can select one of two
16-bit timers (Timer2 or Timer3) for the time base.
The selected timer can use either an internal or
external clock.
Other operational features include:
• Device wake-up from capture pin during CPU
• Interrupt on input capture event
• 4-word FIFO buffer for capture values:
• Use of input capture to provide additional sources
ICTMR
- Capture timer value on every falling edge of
- Capture timer value on every rising edge of
- Capture timer value on every 4th rising edge
- Capture timer value on every 16th rising
Sleep and Idle modes
- Interrupt optionally generated after 1, 2, 3 or
of external interrupts
Note:
input at ICx pin
input at ICx pin
Capture timer value on every edge (rising and
falling)
Prescaler Capture Event modes:
of input at ICx pin
edge of input at ICx pin
4 buffer locations are filled
FIFO CONTROL
TMR2 TMR3
ICxBUF
ICI<1:0>
Only IC1 and IC2 can trigger a DMA data
transfer. If DMA data transfers are
required, the FIFO buffer size must be set
to ‘1’ (ICI<1:0> = 00).
/N
FIFO
ICM<2:0>
001
111
To CPU
(In IFSx Register)
Set Flag ICxIF
DS70293D-page 169