PIC24HJ64GP502-E/MM Microchip Technology, PIC24HJ64GP502-E/MM Datasheet - Page 207

• Manufacturer Part Number: PIC24HJ64GP502-E/MM
• Description: IC PIC MCU FLASH 64K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP502-E/MM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 19-11: CiFEN1: ECAN™ ACCEPTANCE FILTER ENABLE REGISTER
REGISTER 19-12: CiBUFPNT1: ECAN™ FILTER 0-3 BUFFER POINTER REGISTER
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
FLTEN15
FLTEN7
R/W-1
R/W-1
R/W-0
R/W-0
FLTENn: Enable Filter n to Accept Messages bits
1 = Enable Filter n
0 = Disable Filter n
F3BP<3:0>: RX Buffer mask for Filter 3
1111 = Filter hits received in RX FIFO buffer
1110 = Filter hits received in RX Buffer 14
•
•
•
0001 = Filter hits received in RX Buffer 1
0000 = Filter hits received in RX Buffer 0
F2BP<3:0>: RX Buffer mask for Filter 2 (same values as bit 15-12)
F1BP<3:0>: RX Buffer mask for Filter 1 (same values as bit 15-12)
F0BP<3:0>: RX Buffer mask for Filter 0 (same values as bit 15-12)
FLTEN14
FLTEN6
R/W-1
R/W-1
R/W-0
R/W-0
F3BP<3:0>
F1BP<3:0>
C = Writeable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writeable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
FLTEN13
FLTEN5
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN12
FLTEN4
R/W-1
R/W-1
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FLTEN11
FLTEN3
R/W-1
R/W-1
R/W-0
R/W-0
FLTEN10
FLTEN2
R/W-1
R/W-1
R/W-0
R/W-0
F2BP<3:0>
F0BP<3:0>
x = Bit is unknown
x = Bit is unknown
FLTEN9
FLTEN1
R/W-1
R/W-1
R/W-0
R/W-0
DS70293D-page 207
FLTEN8
FLTEN0
R/W-1
R/W-1
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0