PIC24HJ64GP502-E/MM Microchip Technology, PIC24HJ64GP502-E/MM Datasheet - Page 213

• Manufacturer Part Number: PIC24HJ64GP502-E/MM
• Description: IC PIC MCU FLASH 64K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP502-E/MM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 19-20: CiRXMnSID: ECAN™ ACCEPTANCE FILTER MASK STANDARD IDENTIFIER
REGISTER 19-21: CiRXMnEID: ECAN™ ACCEPTANCE FILTER MASK EXTENDED IDENTIFIER
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-5
bit 4
bit 3
bit 2
bit 1-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
R/W-x
SID10
R/W-x
R/W-x
EID15
R/W-x
SID2
EID7
SID<10:0>: Standard Identifier bits
1 = Include bit SIDx in filter comparison
0 = Bit SIDx is don’t care in filter comparison
Unimplemented: Read as ‘0’
MIDE: Identifier Receive Mode bit
1 = Match only message types (standard or extended address) that correspond to EXIDE bit in filter
0 = Match either standard or extended address message if filters match
Unimplemented: Read as ‘0’
EID<17:16>: Extended Identifier bits
1 = Include bit EIDx in filter comparison
0 = Bit EIDx is don’t care in filter comparison
EID<15:0>: Extended Identifier bits
1 = Include bit EIDx in filter comparison
0 = Bit EIDx is don’t care in filter comparison
R/W-x
R/W-x
R/W-x
EID14
R/W-x
SID9
SID1
(i.e., if (Filter SID) = (Message SID) or if (Filter SID/EID) = (Message SID/EID))
EID6
REGISTER n (n = 0-2)
REGISTER n (n = 0-2)
C = Writeable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
C = Writeable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
R/W-x
EID13
R/W-x
SID8
SID0
EID5
R/W-x
R/W-x
EID12
R/W-x
SID7
EID4
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
R/W-x
R/W-x
EID11
R/W-x
MIDE
SID6
EID3
R/W-x
R/W-x
EID10
R/W-x
SID5
EID2
U-0
—
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
EID17
R/W-x
R/W-x
SID4
EID9
EID1
DS70293D-page 213
R/W-x
R/W-x
EID16
R/W-x
R/W-x
SID3
EID8
EID0
bit 8
bit 0
bit 8
bit 0