PIC24HJ64GP502-E/MM Microchip Technology, PIC24HJ64GP502-E/MM Datasheet - Page 350

• Manufacturer Part Number: PIC24HJ64GP502-E/MM
• Description: IC PIC MCU FLASH 64K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP502-E/MM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit or 10-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ECAN Registers
ECAN Transmit/Receive Error Count Register (CiEC) ..... 205
ECAN TX/RX Buffer m Control Register (CiTRmnCON) .. 216
Electrical Characteristics................................................... 283
Enhanced CAN Module..................................................... 195
Equations
Errata .................................................................................. 10
F
Flash Program Memory....................................................... 53
Flexible Configuration ....................................................... 261
H
High Temperature Electrical Characteristics..................... 323
I
I/O Ports ............................................................................ 135
I
In-Circuit Debugger ........................................................... 267
In-Circuit Emulation........................................................... 261
DS70293D-page 350
2
C
CiTRmnCON register ................................................ 216
CiVEC register .......................................................... 200
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1) ......... 39
ECAN1 Register Map (C1CTRL1.WIN = 0) ................ 39
ECAN1 Register Map (C1CTRL1.WIN = 1) ................ 40
Frame Types ............................................................. 195
Modes of Operation .................................................. 197
Overview ................................................................... 195
Acceptance Filter Enable Register (CiFEN1)............ 207
Acceptance Filter Extended Identifier Register n (CiRXF-
Acceptance Filter Mask Extended Identifier Register n
Acceptance Filter Mask Standard Identifier Register n
Acceptance Filter Standard Identifier Register n (CiRXF-
Baud Rate Configuration Register 1 (CiCFG1) ......... 205
Baud Rate Configuration Register 2 (CiCFG2) ......... 206
Control Register 1 (CiCTRL1) ................................... 198
Control Register 2 (CiCTRL2) ................................... 199
FIFO Control Register (CiFCTRL) ............................ 201
FIFO Status Register (CiFIFO) ................................. 202
Filter 0-3 Buffer Pointer Register (CiBUFPNT1) ....... 207
Filter 12-15 Buffer Pointer Register (CiBUFPNT4) ... 209
Filter 15-8 Mask Selection Register (CiFMSKSEL2). 212
Filter 4-7 Buffer Pointer Register (CiBUFPNT2) ....... 208
Filter 7-0 Mask Selection Register (CiFMSKSEL1)... 211
Filter 8-11 Buffer Pointer Register (CiBUFPNT3) ..... 208
Interrupt Code Register (CiVEC) .............................. 200
Interrupt Enable Register (CiINTE) ........................... 204
Interrupt Flag Register (CiINTF) ............................... 203
Receive Buffer Full Register 1 (CiRXFUL1).............. 214
Receive Buffer Full Register 2 (CiRXFUL2).............. 214
Receive Buffer Overflow Register 2 (CiRXOVF2)..... 215
Receive Overflow Register (CiRXOVF1) .................. 215
AC ..................................................................... 292, 326
Device Operating Frequency .................................... 120
Control Registers ........................................................ 54
Operations .................................................................. 54
Programming Algorithm .............................................. 57
RTSP Operation.......................................................... 54
Table Instructions........................................................ 53
Parallel I/O (PIO)....................................................... 135
Write/Read Timing .................................................... 136
Operating Modes ...................................................... 181
Registers ................................................................... 181
nEID)................................................................. 211
(CiRXMnEID) .................................................... 213
(CiRXMnSID) .................................................... 213
nSID)................................................................. 210
Preliminary
In-Circuit Serial Programming (ICSP)....................... 261, 267
Input Capture .................................................................... 169
Input Change Notification ................................................. 136
Instruction Addressing Modes ............................................ 47
Instruction Set
Instruction-Based Power-Saving Modes........................... 129
Internal RC Oscillator
Internet Address ............................................................... 353
Interrupt Control and Status Registers ............................... 71
Interrupt Setup Procedures............................................... 105
Interrupt Vector Table (IVT) ................................................ 67
Interrupts Coincident with Power Save Instructions ......... 130
J
JTAG Boundary Scan Interface ........................................ 261
JTAG Interface.................................................................. 267
M
Memory Organization ......................................................... 25
Microchip Internet Web Site.............................................. 353
Modes of Operation
MPLAB ASM30 Assembler, Linker, Librarian ................... 280
MPLAB ICD 3 In-Circuit Debugger System ...................... 281
MPLAB Integrated Development Environment Software.. 279
MPLAB PM3 Device Programmer .................................... 282
MPLAB REAL ICE In-Circuit Emulator System ................ 281
MPLINK Object Linker/MPLIB Object Librarian ................ 280
Multi-Bit Data Shifter........................................................... 24
N
NVM Module
O
Open-Drain Configuration................................................. 136
Output Compare ............................................................... 171
P
Packaging ......................................................................... 333
Registers .................................................................. 170
File Register Instructions ............................................ 47
Fundamental Modes Supported ................................. 48
MCU Instructions ........................................................ 47
Move and Accumulator Instructions............................ 48
Other Instructions ....................................................... 48
Overview................................................................... 273
Summary .................................................................. 271
Idle ............................................................................ 130
Sleep ........................................................................ 129
Use with WDT........................................................... 266
IECx ............................................................................ 71
IFSx ............................................................................ 71
INTCON1 .................................................................... 71
INTCON2 .................................................................... 71
IPCx ............................................................................ 71
Initialization ............................................................... 105
Interrupt Disable ....................................................... 105
Interrupt Service Routine .......................................... 105
Trap Service Routine ................................................ 105
Disable...................................................................... 197
Initialization ............................................................... 197
Listen All Messages.................................................. 197
Listen Only................................................................ 197
Loopback .................................................................. 197
Normal Operation ..................................................... 197
Register Map .............................................................. 46
Details....................................................................... 334
Marking ..................................................................... 333
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