AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 354

MCU ARM 512K HS FLASH 100-TFBGA

AT91SAM7XC512-CU

Manufacturer Part Number
AT91SAM7XC512-CU
Description
MCU ARM 512K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7XC512-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
MII, SPI, TWI
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7XC512-CU
Manufacturer:
Atmel
Quantity:
10 000
31.6.3.3
354
AT91SAM7XC512/256/128 Preliminary
Synchronous Receiver
transmitter can occur. Moreover, as soon as the stop bit is sampled, the receiver starts looking
for a new start bit so that resynchronization can also be accomplished when the transmitter is
operating with one stop bit.
Figure 31-8
operates in asynchronous mode.
Figure 31-8. Asynchronous Start Detection
Figure 31-9. Asynchronous Character Reception
In synchronous mode (SYNC = 1), the receiver samples the RXD signal on each rising edge of
the Baud Rate Clock. If a low level is detected, it is considered as a start. All data bits, the parity
bit and the stop bits are sampled and the receiver waits for the next start bit. Synchronous mode
operations provide a high speed transfer capability.
Configuration fields and bits are the same as in asynchronous mode.
Figure 31-10
Clock (x16)
Baud Rate
Sampling
Sampling
Sampling
Baud Rate
Example: 8-bit, Parity Enabled
Detection
Clock
RXD
RXD
Start
Clock
RXD
and
illustrates a character reception in synchronous mode.
1
1
Figure 31-9
2
2
samples
3
3
16
4
4
D0
5
5
samples
illustrate start detection and character reception when USART
16
6
6
D1
7
Detection
7
Rejection
samples
Start
Start
16
8
0
D2
1
1
samples
16
2
2
3
3
D3
samples
4
4
16
5
D4
samples
6
16
7
D5
samples
8
16
9 10 11 12 13 14 15 16
D6
samples
16
D7
samples
16
6209F–ATARM–17-Feb-09
Parity
Bit
samples
16
Stop
Bit
Sampling
D0

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