AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 527

• Manufacturer Part Number: AT91SAM7XC512-CU
• Description: MCU ARM 512K HS FLASH 100-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7XC512-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Interface Type: MII, SPI, TWI
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

37. Triple Data Encryption Standard (TDES)
37.1
37.2
37.2.1
37.2.2
37.3
6209F–ATARM–17-Feb-09
Overview
Product Dependencies
Functional Description
Power Management
Interrupt
The Triple Data Encryption Standard (TDES) is compliant with the American FIPS (Federal
Information Processing Standard) Publication 46-3 specification.
The TDES supports the four different confidentiality modes of operation (ECB, CBC, OFB and
CFB), specified in the FIPS (Federal Information Processing Standard) Publication 81 and is
compatible with the Peripheral Data Controller channels for all of these modes, minimizing pro-
cessor intervention for large buffer transfers.
The 64-bit long keys and input data (and initialization vector for some modes) are each stored in
two 32-bit registers (TDES_KEYxWxR, TDES_IDATAxR and TDES_IVxR) which are both write-
only.
As soon as the initialization vector, the input data and the key are configured, the encryp-
tion/decryption process may be started. Then the encrypted/decrypted data is ready to be read
out on the two 32-bit output data registers (TDES_ODATAxR) or through the PDC channels.
The TDES may be clocked through the Power Management Controller (PMC), so the program-
mer must first configure the PMC to enable the TDES clock.
The TDES interface has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Handling the TDES interrupt requires programming the AIC before configuring the TDES.
The Data Encryption Standard (DES) and the Triple Data Encryption Algorithm (TDEA) specify
FIPS-approved cryptographic algorithms that can be used to protect electronic data. The TDES
bit in the TDES Mode Register (TDES_MR) is used to select either the single DES or the Triple
DES mode.
Encryption (enciphering) converts data to an unintelligible form called ciphertext. Decrypting
(deciphering) the ciphertext converts the data back into its original form, called plaintext. The
CIPHER bit in the TDES Mode Register is used to choose between encryption and decryption.
A DES is capable of using cryptographic keys of 64 bits to encrypt and decrypt data in blocks of
64 bits. This 64-bit key is defined in the Key 1 Word Registers (TDES_KEY1WxR).
A TDEA key consists of three DES keys, which is also referred to as a key bundle. These three
64-bit keys are defined, respectively, in the Key 1, 2 and 3 Word Registers (TDES_KEY1WxR,
TDES_KEY2WxR and TDES_KEY3WxR). In Triple DES mode (TDESMOD set to 1), the KEY-
MOD bit in the TDES Mode Register is used to choose between a two- and a three-key
algorithm:
– In three-key encryption mode, the data is first encrypted with Key 1, then decrypted
– In three-key decryption mode, the data is decrypted with Key 3, then encrypted with
using Key 2 and then encrypted with Key 3.
Key 2 and then decrypted using Key 1.
AT91SAM7XC512/256/128 Preliminary
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