AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 528

MCU ARM 512K HS FLASH 100-TFBGA

AT91SAM7XC512-CU

Manufacturer Part Number
AT91SAM7XC512-CU
Description
MCU ARM 512K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7XC512-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
MII, SPI, TWI
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
62
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7XC512-CU
Manufacturer:
Atmel
Quantity:
10 000
37.3.1
37.3.2
37.3.2.1
528
AT91SAM7XC512/256/128 Preliminary
Operation Modes
Start Modes
Manual Mode
The input to the encryption processes of the CBC, CFB, and OFB modes includes, in addition to
the plaintext, a 64-bit data block called the initialization vector (IV), which must be set in the Ini-
tialization Vector Registers (TDES_IVxR). The initialization vector is used in an initial step in the
encryption of a message and in the corresponding decryption of the message.
The TDES supports the following modes of operation:
The data pre-processing, post-processing and data chaining for each mode are automatically
performed. Refer to the FIPS Publication 81 for more complete information.
These modes are selected by setting the OPMOD field in the TDES Mode Register (TDES_MR).
In CFB mode, four data sizes are possible (8, 16, 32 and 64 bits), configurable by means of the
CFBS field in the mode register.
The SMOD field in the TDES Mode Register (TDES_MR) allows selection of encryption (or
decryption) start mode.
The sequence is as follows:
Note:
Table 37-1.
• ECB: Electronic Code Book
• CBC: Cipher Block Chaining
• OFB: Output Feedback
• CFB: Cipher Feedback
• Write the 64-bit key(s) in the different Key Word Registers (TDES_KEYxWxR), depending on
• Write the initialization vector (or counter) in the Initialization Vector Registers (TDES_IVxR).
• Set the bit DATRDY (Data Ready) in the TDES Interrupt Enable register (TDES_IER),
• Write the data to be encrypted/decrypted in the authorized Input Data Registers (See
whether one, two or three keys are required.
depending on whether an interrupt is required or not at the end of processing.
37-1).
Operation Mode
– In two-key encryption mode, the data is first encrypted with Key 1, then decrypted
– In two-key decryption mode, the data is decrypted with Key 1, then encrypted with
– CFB8 (CFB where the length of the data segment is 8 bits)
– CFB16 (CFB where the length of the data segment is 16 bits)
– CFB32 (CFB where the length of the data segment is 32 bits)
– CFB64 (CFB where the length of the data segment is 64 bits)
using Key 2 and then encrypted with Key 1.
Key 2 and then decrypted using Key 1.
The Initialization Vector Registers concern all modes except ECB.
ECB
CBC
Authorized Input Data Registers
(See “TDES Mode Register” on page
Input Data Registers to Write
All
All
536.).
6209F–ATARM–17-Feb-09
Table

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