AT91SAM7XC512-CU Atmel, AT91SAM7XC512-CU Datasheet - Page 715

• Manufacturer Part Number: AT91SAM7XC512-CU
• Description: MCU ARM 512K HS FLASH 100-TFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7XC512-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 128 KB
• Interface Type: MII, SPI, TWI
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 62
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7XC-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7XC-EK - KIT EVAL FOR AT91SAM7XC256/128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6209F–ATARM–17-Feb-09
Version
6209D
(Continued)
Comments
UDP: Added warning to
TXVC (3),
“Power Management” on page 401.
Corrections, improvements, additions and deletions throughout section, new source document.
Section 33.5.3.8 ”Sending a Device Remote Wakeup”
WAKEUP bit shown in interruput registers:
427
RMWUPE, RSMINPR, ESR bits removed from
NOTE: pertinent to USB pullup effect on USB Reset added to
Control Register”
ADC:Section 35.5.7 ”ADC Timings”
Figure 35-1, ”Analog-to-Digital Converter Block Diagram” on page 473
differentiated in new block diagram.
AES:
configuration for AT91SAM7XC512.
CAN: Update to message acceptance example in
on page
New information on byte priority added to
page 586
Corrected MDL bit description in
Update to specify allowed values for BRP field on
543
EMAC:
“Interrupt Disable Register” on page
“Interrupt Mask Register” on page
and in
Section 36. “Advanced Encryption Standard (AES)” on page 493
“Interrupt Enable Register” on page
538.
and
to
Section 38.8.6 “CAN Baudrate Register” on page
Section 33.6.12 “UDP Transceiver Control Register” on page 434
Section 38.8.18 “CAN Message Data High Register” on page
Section 33.6 “USB Device Port (UDP) User Interface” on page
Section 38.8.17 “CAN Message Data Low Register” on page
619, access changed to Read-only.
in Warning: “See ADC Characteristics....” typo fixed
AT91SAM7XC512/256/128 Preliminary
618, access changed to Write-only.
Section 38.8.17 “CAN Message Data Low Register” on
Section 33.6.4 on page 422
617, access changed to Write-only.
Section 33.6.2 ”UDP Global State
Section 38.6.2.1 “Message Acceptance Procedure”
Section 38.6.4 ”CAN 2.0 Standard Features”, page
replaces title: “Sending an External Resume.
573.
Section 33.6.12 ”UDP Transceiver
dedicated and I/O lines
updated to reflect AES
thru
Section 33.6.8 on page
587.
and to
Register”.
Section 33.3.2
418, to
586.
UDP_
Change
Request
Ref.
05-413
3288
2830
3052
2295, 2296
2476
2597
1725
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