LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 174

• Manufacturer Part Number: LPC1343FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4945; 935289652151

NXP Semiconductors
UM10375
User manual
11.6.8.1.1 Auto-RTS
11.6.8.1 Auto-flow control
Table 196. UART0 Modem Control Register (U0MCR - address 0x4000 8010) bit description
If auto-RTS mode is enabled the UART‘s receiver FIFO hardware controls the RTS output
of the UART. If the auto-CTS mode is enabled the UART‘s U0TSR hardware will only start
transmitting if the CTS input signal is asserted.
The auto-RTS function is enabled by setting the RTSen bit. Auto-RTS data flow control
originates in the U0RBR module and is linked to the programmed receiver FIFO trigger
level. If auto-RTS is enabled, the data-flow is controlled as follows:
When the receiver FIFO level reaches the programmed trigger level, RTS is de-asserted
(to a high value). It is possible that the sending UART sends an additional byte after the
trigger level is reached (assuming the sending UART has another byte to send) because it
might not recognize the de-assertion of RTS until after it has begun sending the additional
byte. RTS is automatically reasserted (to a low value) once the receiver FIFO has reached
the previous trigger level. The reassertion of RTS signals the sending UART to continue
transmitting data.
If Auto-RTS mode is disabled, the RTSen bit controls the RTS output of the UART. If
Auto-RTS mode is enabled, hardware controls the RTS output, and the actual value of
RTS will be copied in the RTS Control bit of the UART. As long as Auto-RTS is enabled,
the value of the RTS Control bit is read-only for software.
Example: Suppose the UART operating in type ‘550 mode has the trigger level in U0FCR
set to 0x2, then, if Auto-RTS is enabled, the UART will de-assert the RTS output as soon
as the receive FIFO contains 8 bytes
reasserted as soon as the receive FIFO hits the previous trigger level: 4 bytes.
Bit
4
5
6
7
-
CTSen
Symbol
Loopback
Mode
Select
RTSen
All information provided in this document is subject to legal disclaimers.
Value Description
0
1
NA
0
1
0
1
The modem loopback mode provides a mechanism to perform
diagnostic loopback testing. Serial data from the transmitter is
connected internally to serial input of the receiver. Input pin, RXD,
has no effect on loopback and output pin, TXD is held in marking
state. The four modem inputs (CTS, DSR, RI and DCD) are
disconnected externally. Externally, the modem outputs (RTS,
DTR) are set inactive. Internally, the four modem outputs are
connected to the four modem inputs. As a result of these
connections, the upper four bits of the U0MSR will be driven by
the lower four bits of the U0MCR rather than the four modem
inputs in normal mode. This permits modem status interrupts to
be generated in loopback mode by writing the lower four bits of
U0MCR.
Disable modem loopback mode.
Enable modem loopback mode.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Disable auto-rts flow control.
Enable auto-rts flow control.
Disable auto-cts flow control.
Enable auto-cts flow control.
Rev. 2 — 7 July 2010
(Table 194 on page
174). The RTS output will be
Chapter 11: LPC13xx UART
UM10375
© NXP B.V. 2010. All rights reserved.
176 of 333
Reset
value
0
0
0
0