LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 288

• Manufacturer Part Number: LPC1343FBD48,151
• Description: IC MCU 32BIT 32KB FLASH 48LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC13xxr

Specifications of LPC1343FBD48,151

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 40
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC13
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
• Development Tools By Supplier: OM11039, OM11040, OM11046, OM11048
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: LPC1000
• Device Core: ARM Cortex-M3
• Device Core Size: 32b
• Frequency (max): 72MHz
• Total Internal Ram Size: 8KB
• # I/os (max): 42
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4945; 935289652151

19.1 How to read this chapter
19.2 Bootloader
UM10375
User manual
19.2.1 Bootloader code version 5.2 notes
See
not have an USB interface and only the UART ISP option is supported.
Table 284. LPC13xx flash configurations
Remark: In addition to the ISP and IAP commands, a register can be accessed in the
flash controller block to configure flash memory access times, see
The bootloader controls initial operation after reset and also provides the means to
program the flash memory. This could be initial programming of a blank device, erasure
and re-programming of a previously programmed device, or programming of the flash
memory by the application program in a running system.
The bootloader version can be read by ISP/IAP calls (see
Section
Table 285. Bootloader versions
[1]
In bootloader version 5.2 (LPC134x parts), the mass storage device state machine uses
an uninitialized variable. This has two consequences:
Type number
LPC1311FHN33
LPC1313FBD48
LPC1313FHN33
LPC1342FHN33
LPC1343FBD48
LPC1343FHN33
Part
LPC1311
LPC1313
LPC1342
LPC1343
UM10375
Chapter 19: LPC13xx Flash memory programming firmware
Rev. 2 — 7 July 2010
Typical LPC134x devices have the following top-side marking:
LPC1343x
xxxxxxx
xxYYWW<bootloader version>R[x]
Table 284
19.14.6) and is part of the chip marking for some LPC13xx parts (see
Bootloader
version read by
ISP/IAP
5.1
5.1
5.2
5.2
for different flash configurations and functionality. The LPC131x parts do
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 July 2010
Top-side marking
no marking
no marking
1
1
Flash
8 kB
32 kB
32 kB
16 kB
32 kB
32 kB
[1]
-
Notes
-
See
See
ISP via USB
no
no
no
yes
yes
yes
Section
Section
Section 19.13.12
19.2.1.
19.2.1.
Section
ISP via UART
yes
yes
yes
yes
yes
yes
© NXP B.V. 2010. All rights reserved.
User manual
19.16.
or
Table
290 of 333
285).