LPC1343FBD48,151 NXP Semiconductors, LPC1343FBD48,151 Datasheet - Page 295

IC MCU 32BIT 32KB FLASH 48LQFP

LPC1343FBD48,151

Manufacturer Part Number
LPC1343FBD48,151
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
NXP Semiconductors
Series
LPC13xxr
Datasheets

Specifications of LPC1343FBD48,151

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
I²C, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
40
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC13
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
42
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, KSK-LPC1343
Development Tools By Supplier
OM11039, OM11040, OM11046, OM11048
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1000
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4945
935289652151

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NXP Semiconductors
19.11 Sector numbers
19.12 Code Read Protection (CRP)
UM10375
User manual
Some IAP and ISP commands operate on sectors and specify sector numbers. The
following table shows the correspondence between sector numbers and memory
addresses for LPC13xx devices.
Table 287. LPC13xx flash sectors
Code Read Protection is a mechanism that allows the user to enable different levels of
security in the system so that access to the on-chip flash and use of the ISP can be
restricted. When needed, CRP is invoked by programming a specific pattern in flash
location at 0x0000 02FC. IAP commands are not affected by the code read protection.
Important: any CRP change becomes effective only after the device has gone
through a power cycle.
Sector
number
0
1
2
3
4
5
6
7
Sector
size [kB]
4
4
4
4
4
4
4
4
All information provided in this document is subject to legal disclaimers.
Address range
0x0000 0000 - 0x0000 0FFF yes
0x0000 1000 - 0x0000 1FFF yes
0x0000 2000 - 0x0000 2FFF -
0x0000 3000 - 0x0000 3FFF -
0x0000 4000 - 0x0000 4FFF -
0x0000 5000 - 0x0000 5FFF -
0x0000 6000 - 0x0000 6FFF -
0x0000 7000 - 0x0000 7FFF -
Rev. 2 — 7 July 2010
Chapter 19: LPC13xx Flash memory programming firmware
LPC1311 LPC1313 LPC1342
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UM10375
© NXP B.V. 2010. All rights reserved.
LPC1343
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