ST10F269Z2Q3 STMicroelectronics, ST10F269Z2Q3 Datasheet - Page 38

IC FLASH MEM 256KBIT 144-PQFP

ST10F269Z2Q3

Manufacturer Part Number
ST10F269Z2Q3
Description
IC FLASH MEM 256KBIT 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-2042

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6 - CENTRAL PROCESSING UNIT (CPU)
6.2 - Instruction Set Summary
The Table 4 lists the instructions of the ST10F269. The various addressing modes, instruction operation,
parameters for conditional execution of instructions, opcodes and a detailed description of each instruc-
tion can be found in the “ST10 Family Programming Manual”.
Table 4 : Instruction Set Summary
38/184
ADD(B)
ADDC(B)
SUB(B)
SUBC(B)
MUL(U)
DIV(U)
DIVL(U)
CPL(B)
NEG(B)
AND(B)
OR(B)
XOR(B)
BCLR
BSET
BMOV(N)
BAND, BOR, BXOR
BCMP
BFLDH/L
CMP(B)
CMPD1/2
CMPI1/2
PRIOR
SHL / SHR
ROL / ROR
ASHR
MOV(B)
MOVBS
MOVBZ
JMPA, JMPI, JMPR
JMPS
J(N)B
JBC
Mnemonic
Add word (byte) operands
Add word (byte) operands with Carry
Subtract word (byte) operands
Subtract word (byte) operands with Carry
(Un)Signed multiply direct GPR by direct GPR (16-16-bit)
(Un)Signed divide register MDL by direct GPR (16-/16-bit)
(Un)Signed long divide reg. MD by direct GPR (32-/16-bit)
Complement direct word (byte) GPR
Negate direct word (byte) GPR
Bit-wise AND, (word/byte operands)
Bit-wise OR, (word/byte operands)
Bit-wise XOR, (word/byte operands)
Clear direct bit
Set direct bit
Move (negated) direct bit to direct bit
AND/OR/XOR direct bit with direct bit
Compare direct bit to direct bit
Bit-wise modify masked high/low byte of bit-addressable direct word memory
with immediate data
Compare word (byte) operands
Compare word data to GPR and decrement GPR by 1/2
Compare word data to GPR and increment GPR by 1/2
Determine number of shift cycles to normalize direct word GPR and store result
in direct word GPR
Shift left/right direct word GPR
Rotate left/right direct word GPR
Arithmetic (sign bit) shift right direct word GPR
Move word (byte) data
Move byte operand to word operand with sign extension
Move byte operand to word operand with zero extension
Jump absolute/indirect/relative if condition is met
Jump absolute to a code segment
Jump relative if direct bit is (not) set
Jump relative and clear bit if direct bit is set
Description
ST10F269
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