ST10F269Z2Q3 STMicroelectronics, ST10F269Z2Q3 Datasheet - Page 49

IC FLASH MEM 256KBIT 144-PQFP

ST10F269Z2Q3

Manufacturer Part Number
ST10F269Z2Q3
Description
IC FLASH MEM 256KBIT 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-2042

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ST10F269
9 - CAPTURE/COMPARE (CAPCOM) UNITS
The ST10F269 has two 16 channels CAPCOM
units as described in Figure 12. These support
generation and control of timing sequences on up
to 32 channels with a maximum resolution of
200ns at 40MHz CPU clock on PQFP144 devices
and 250ns at 32MHz CPU clock on TQFP144
devices. The CAPCOM units are typically used to
handle high speed I/O tasks such as pulse and
waveform generation, pulse width modulation
(PMW), Digital to Analog (D/A) conversion,
software timing, or time recording relative to
external events.
Four 16-bit timers (T0/T1, T7/T8) with reload
registers provide two independent time bases for
the capture/compare register array (See Figures
Figure 13 and Figure 14).
The input clock for the timers is programmable to
several prescaled values of the internal system
clock, or may be derived from an overflow/
Figure 12 : CAPCOM Unit Block Diagram
CPU
Clock
CPU
Clock
TxIN
Over / Underflow
Compare outputs
GPT2 Timer T6
Over / Underflow
GPT2 Timer T6
Capture inputs
2
2
n
n
n = 3...10
n = 3...10
Pin
Pin
Pin
16
Compare)
(Capture
Control
Control
Control
Mode
Input
Input
Tx
Ty
or
9 - CAPTURE/COMPARE (CAPCOM) UNITS
underflow of timer T6 in module GPT2. This
provides a wide range of variation for the timer
period
adjustments to application specific requirements.
In addition, external count inputs for CAPCOM
timers T0 and T7 allow event scheduling for the
capture/compare registers relative to external
events.
Each of the two capture/compare register arrays
contain
registers, each of which may be individually
allocated to either CAPCOM timer T0 or T1 (T7 or
T8, respectively), and programmed for capture or
compare functions. Each of the 32 registers has
one associated port pin which serves as an input
pin for triggering the capture function, or as an
output pin to indicate the occurrence of a compare
event. Figure 12 shows the basic structure of the
two CAPCOM units.
Reload Register TxREL
Reload Register TyREL
CAPCOM Timer Tx
(Capture/Compare)
CAPCOM Timer Ty
Sixteen 16-bit
Registers
and
16
resolution
dual
purpose
Capture / Compare*
Interrupt Requests
Interrupt
Request
Interrupt
Request
and
16
capture/compare
allows
x = 0, 7
y = 1, 8
precise
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