ST10F269Z2Q3 STMicroelectronics, ST10F269Z2Q3 Datasheet - Page 42

IC FLASH MEM 256KBIT 144-PQFP

ST10F269Z2Q3

Manufacturer Part Number
ST10F269Z2Q3
Description
IC FLASH MEM 256KBIT 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-2042

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6 - CENTRAL PROCESSING UNIT (CPU)
The Table 5 shows the various combinations of pointer post-modification for each of these 2 new address-
ing modes. In this document the symbols “[Rw
Table 5 : Pointer Post-modification Combinations for IDXi and Rwn
Table 6 : MAC Registers Referenced as ‘CoReg‘
42/184
“[IDX
“[Rw
MSW
MAH
MAS
MAL
MCW
MRW
n
i
Registers
]” stands for
]” stands for
Symbol
MAC-Unit Status Word
MAC-Unit Accumulator High
“limited” MAH /signed
MAC-Unit Accumulator Low
MAC-Unit Control Word
MAC-Unit Repeat Word
[IDX
[IDX
[IDX
[IDX
[IDX
[Rwn]
[Rwn ]
[Rwn-]
[Rwn
[Rwn - QR
Mnemonic
i
i
i
i
i
]
-]
- QX
]
QX
QR
j
j
j
]
j
]
]
]
Description
n
(IDX
(IDX
(IDX
(IDX
(IDX
(Rwn)
(Rwn)
(Rwn)
(Rwn)
(Rwn)
]” and “[IDX
i
i
i
i
i
)
)
)
)
)
(IDX
(IDX
(IDX
(IDX
(IDX
(Rwn)
(Rwn) + 2
(Rwn) - 2
(Rwn) + (QR
(Rwn) - (QR
i
i
i
i
i
i
)
) + 2
) - 2
) + (QX
) - (QX
]” refer to these addressing modes.
Address Pointer Operation
j
j
j
)
j
)
)
)
(no-op)
(i=0,1)
(i=0,1)
(no-op)
(i, j =0,1)
(i, j =0,1)
(n=0-15)
(n=0-15)
Address in Opcode
(n=0-15; j =0,1)
(n=0-15; j =0,1)
00000b
00001b
00010b
00100b
00101b
00110b
ST10F269

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