ST10F269Z2Q3 STMicroelectronics, ST10F269Z2Q3 Datasheet - Page 5

• Manufacturer Part Number: ST10F269Z2Q3
• Description: IC FLASH MEM 256KBIT 144-PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269Z2Q3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-QFP
• Processor Series: ST10F26x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 0.3 V to 4 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Cpu Family: ST10
• Device Core Size: 16b
• Frequency (max): 40MHz
• Total Internal Ram Size: 12KB
• # I/os (max): 111
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC/RISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-2042

TABLE OF CONTENTS
ST10F269
22 -
23 -
ERRATA SHEET
1 -
2 -
3 -
4 -
Package Mechanical Data ..................................................................................... 178
Ordering Information ............................................................................................... 180
DESCRIPTION ....................................................................................................... 181
FUNCTIONAL PROBLEMS .................................................................................... 181
2.1 -
2.2 -
2.3 -
2.4 -
DEVIATIONS FROM DC/AC PRELIMINARY SPECIFICATION ............................ 183
ERRATA SHEET VERSION INFORMATION ......................................................... 183
21.4.7 -
21.4.8 -
21.4.9 -
21.4.10 - Multiplexed Bus ........................................................................................... 152
21.4.11 - Demultiplexed Bus ...................................................................................... 160
21.4.12 - CLKOUT and READY ................................................................................. 168
21.4.13 - External Bus Arbitration ............................................................................... 171
21.4.14 - High-Speed Synchronous Serial Interface (SSC) Timing ............................ 174
PWRDN.1 - EXECUTION OF PWRDN INSTRUCTION ............................................. 181
MAC.9 - COCMP INSTRUCTION INVERTED OPERANDS ....................................... 182
MAC.10 - E FLAG EVALUATION FOR COSHR AND COASHR INSTRUCTIONS WHEN
SATURATION MODE IS ENABLED ........................................................................... 182
ST_PORT.3 - BAD BEHAVIOR OF HYSTERESIS FUNCTION ON INPUT FALLING
EDGE .......................................................................................................................... 183
Phase Locked Loop ..................................................................................... 149
External Clock Drive XTAL1 ........................................................................ 150
Memory Cycle Variables ............................................................................. 151
21.4.14.1Master Mode ................................................................................ 174
21.4.14.2Slave mode .................................................................................. 175
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