ST10F269Z2Q3 STMicroelectronics, ST10F269Z2Q3 Datasheet - Page 71

IC FLASH MEM 256KBIT 144-PQFP

ST10F269Z2Q3

Manufacturer Part Number
ST10F269Z2Q3
Description
IC FLASH MEM 256KBIT 144-PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269Z2Q3

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-QFP
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Cpu Family
ST10
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
12KB
# I/os (max)
111
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
CISC/RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
144
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-2042

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Price
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ST10F269
The pins of Port 2 combine internal bus data with alternate data output before the port latch input.
Figure 26 : Block Diagram of a Port 2 Pin
12.6 - Port 3
If this 15-bit port is used for general purpose I/O,
the direction of each line can be configured by the
Write Port P2.y
Compare Trigger
Alternate
Data
Output
Write ODP2.y
Read ODP2.y
Write DP2.y
Open Drain
Read DP2.y
Read P2.y
Direction
Latch
Latch
1
0
MUX
Fast External Interrupt Input
1
Alternate Data Input
Output
Latch
MUX
corresponding direction register DP3. Most port
lines can be switched into push-pull or open drain
mode by the open drain control register ODP2
1
0
Clock
Latch
Input
12 - PARALLEL PORTS
Output
Buffer
x = 7...0
y = 15...0
P2.y
CCyIO
EXxIN
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