MC9S12C32CFAE25 Freescale Semiconductor, MC9S12C32CFAE25 Datasheet - Page 435

IC MCU 32K FLASH 25MHZ 48-LQFP

MC9S12C32CFAE25

Manufacturer Part Number
MC9S12C32CFAE25
Description
IC MCU 32K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFAE25

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 15
Timer Module (TIM16B8CV1) Block Description
15.1
The basic timer consists of a 16-bit, software-programmable counter driven by a seven-stage
programmable prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
is used to operate as a simple event counter or a gated time accumulator. The pulse accumulator shares
timer channel 7 when in event mode.
A full access for the counter registers or the input capture/output compare registers should take place in
one clock cycle. Accessing high byte and low byte separately for all of these registers may not yield the
same result as accessing them in one word.
15.1.1
The TIM16B8CV1 includes these distinctive features:
Freescale Semiconductor
Version
Number
01.03
01.04
01.05
Eight input capture/output compare channels.
Clock prescaling.
16-bit counter.
16-bit pulse accumulator.
Introduction
Features
Revision Dates
05 May 2010
06 Feb 2006
08 July 2008
05 May 2010
08 July 2008
06 Feb 2006
Effective
Date
MC9S12C-Family / MC9S12GC-Family
Table 15-1. Revision History
S. Chinnam
S. Chinnam
Ame Wang
Author
Rev 01.24
Corrected the type at 0x006 and later in the document
from TSCR2 and TSCR1
Revised flag clearing procedure, whereby TEN bit must be
set when clearing flags.
-in 15.3.2.8/15-446,add
-in 15.3.2.11/15-450,TCRE bit description part,add Note
-in 15.4.3/15-459,add
Description of Changes
Figure 15-29
Table 15-11
435

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