MC9S12C32CFAE25 Freescale Semiconductor, MC9S12C32CFAE25 Datasheet - Page 92

IC MCU 32K FLASH 25MHZ 48-LQFP

MC9S12C32CFAE25

Manufacturer Part Number
MC9S12C32CFAE25
Description
IC MCU 32K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFAE25

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 2 Port Integration Module (PIM9C32) Block Description
2.3.2.3.6
Read: Anytime.
Write: Anytime.
2.3.2.3.7
Read: Anytime.
Write: Anytime.
92
Module Base + 0x0015
Module Base + 0x0016
WOMM[5:0]
PPSM[5:0]
Reset
Reset
Field
Field
5–0
5–0
W
W
R
R
Polarity Select Port M — This register selects whether a pull-down or a pull-up device is connected to the pin.
0 A pull-up device is connected to the associated port M pin, if enabled by the associated bit in register PERM
1 A pull-down device is connected to the associated port M pin, if enabled by the associated bit in register PERM
Wired-OR Mode Port M — This register configures the output pins as wired-or. If enabled the output is driven
active low only (open-drain). A logic level of “1” is not driven. This bit has no influence on pins used as inputs.
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
0
0
0
0
7
7
and if the port is used as input or as wired-or output.
and if the port is used as input.
Port M Polarity Select Register (PPSM)
Port M Wired-OR Mode Register (WOMM)
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 2-23. Port M Wired-OR Mode Register (WOMM)
Figure 2-22. Port M Polarity Select Register (PPSM)
Table 2-21. WOMM Field Descriptions
Table 2-20. PPSM Field Descriptions
WOMM5
PPSM5
MC9S12C-Family / MC9S12GC-Family
0
0
5
5
WOMM4
PPSM4
Rev 01.24
0
0
4
4
Description
Description
WOMM3
PPSM3
0
0
3
3
WOMM2
PPSM2
0
0
2
2
WOMM1
PPSM1
Freescale Semiconductor
0
0
1
1
WOMM0
PPSM0
0
0
0
0

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