MC9S12C32CFAE25 Freescale Semiconductor, MC9S12C32CFAE25 Datasheet - Page 480

IC MCU 32K FLASH 25MHZ 48-LQFP

MC9S12C32CFAE25

Manufacturer Part Number
MC9S12C32CFAE25
Description
IC MCU 32K FLASH 25MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r

Specifications of MC9S12C32CFAE25

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
CML12C32SLK - KIT STUDENT LEARNING 16BIT HCS12
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 17 16 Kbyte Flash Module (S12FTS16KV1)
Figure 17-9
Flash array after reset, it is allowed to change in normal modes. This protection scheme can be used by
applications requiring re-programming in single chip mode while providing as much protection as possible
if no re-programming is required.
17.3.2.5.1
The general guideline is that protection can only be added, not removed. All valid transitions between
Flash protection scenarios are specified in
FPROT register will be ignored and the FPROT register will remain unchanged. The contents of the
FPROT register reflect the active protection scenario.
480
illustrates all possible protection scenarios. Although the protection scheme is loaded from the
Flash Protection Restrictions
Scenario
Scenario
Table 17-11. Flash Protection Scenario Transitions
Protection
0xFFFF
0xFFFF
Scenario
Figure 17-9. Flash Protection Scenarios
From
0
1
2
MC9S12C-Family / MC9S12GC-Family
FPHDIS = 1
Table
3
1
X
0
Rev 01.24
17-11. Any attempt to write an invalid scenario to the
To Protection Scenario
Protected Flash
X
X
X
1
FPHDIS = 0
X
2
2
0
(1)
3
Freescale Semiconductor

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