M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 191
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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3
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2
Figure 16.3 U0BRG to U4BRG Registers and U0MR to U4MR Registers
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
UARTi Bit Rate Register
UARTi Transmit/Receive Mode Register
o
o r
0 -
b7
b7
. v
NOTES:
u
1
p
0
0
1. Use the MOV instruction to set the UiBRG register.
2. Set the UiBRG register while no data transfer occurs.
3. Set the CLK1 and CLK0 bits in the UiC0 register, and then the UiBRG register.
b6
, 1
0
b5
2
0
0
b4
5
b3
Page 170
b2
b1
b0
b0
f o
Symbol
CKDIR
IOPOL
SMD0
SMD1
SMD2
3
STPS
PRYE
If the setting value is m, the UiBRG register
divides a count source by m+1
PRY
Bit
3
0
Symbol
U0MR to U4MR
Symbol
U0BRG to U4BRG 0369
(i=0 to 4)
Serial I/O Mode Select
Bit
Internal/External Clock
Select Bit
Stop Bit Length Select
Bit
Odd/Even Parity Select
Bit
Parity Enable Bit
TxD,RxD Input/Output
Polarity Switch Bit
Bit Name
(1, 2, 3)
Function
0368
Address
Address
16,
16,
02E8
02E9
(i=0 to 4)
16,
b2 b1 b0
16,
0 0 0: Serial I/O disabled
0 0 1: Clock synchronous serial I/O mode
0 1 0: I
1 0 0: UART mode, 7-bit transfer data
1 0 1: UART mode, 8-bit transfer data
1 1 0: UART mode, 9-bit transfer data
Do not set value other than the above
0: Internal clock
1: External clock
0: 1 stop bit
1: 2 stop bits
Enables when PRYE = 1
0: Odd parity
1: Even parity
0: Disables a parity
1: Enables a parity
0: Not inversed
1: Inverse
0338
0339
16,
2
16,
C mode
0328
0329
16,
16,
Function
02F8
02F9
16
Setting Range
16
00
16
After Reset
Indeterminate
to FF
After Reset
00
16
16
RW
RW
RW
RW
RW
RW
WO
RW
RW
RW
RW
16. Serial I/O
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