M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 246
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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M
R
R
e
E
3
. v
J
2
Figure 17.5 AD0CON3 Register
0
C
1
9
8 /
0 .
B
0
0
0
2
G
7
N
1
o r
o
A/D0 Control Register 3
0 -
b7
0 0 0
. v
NOTES:
u
1
p
0
1. When the AD0CON3 register is rewritten during the A/D conversion, the conversion result is
2. The AD0CON3 register may be read uncorrectly during the A/D conversion. It must be read or written
3. When the DUS bit is set to "1", the AD00 register stores all A/D conversion results.
4. When the DUS bit is set to "1", set the DMAC.
5. Refer to the note for the CKS0 bit in the AD0CON0 register.
0
b6
, 1
0
indeterminate.
after the A/D converter stops operating.
b5
2
0
0
b4
5
b3
Page 225
b2
b1
0
b0
f o
(b4 - b3)
(b7 - b5)
Symbol
CKS2
3
DUS
(b1)
Bit
3
Symbol
AD0CON3
0
(1, 2)
DMAC Operation
Select Bit
Reserved Bit
Frequency Select Bit
Reserved Bit
Reserved Bit
Bit Name
Address
0395
16
0: Disables DMAC operating mode
1: Enables DMAC operating mode
Set to "0".
When read, its content is indeterminate.
(Note 5)
When read, its content is indeterminate.
Set to "0".
When read, its content is indeterminate.
After Reset
XXXX X000
Function
2
(3, 4)
17. A/D Converter
RW
RW
RW
RW
RW
RO
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