M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 269
M30800SAGP-BL#U5
Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP-BL#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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E
3
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J
2
Figure 21.4 G0MR and G1MR Registers
9 0
C
. 1
8 /
B
0 0
0
0
7 2
G
N
- 1
o
o r
. v
SI/O Communication Mode Register 0
SI/O Communication Mode Register 1
1 0
b7
b7
u
NOTE:
NOTE:
0
p
0 0
b6
b6
, 1
1. Set the GM1 and GM0 bits to "01
1. Set the GM1 and GM0 bits to "01
0 2
b5
b5
0 0 0
0 0 0
5 0
b4
b4
Page 248
b3
b3
b2
b2
b1
b1
b0
b0
f o
(b5 - b3)
(b5 - b3)
UFORM
UFORM
3
Symbol
CKDIR
Symbol
CKDIR
GMD0
GMD1
GMD0
GMD1
0 3
IRS
IRS
Bit
Bit
Symbol
G0MR
Symbol
G1MR
Communication Mode
Select Bit
Internal/External Clock
Select Bit
Reserved Bit
Transfer Format
Select Bit
Transmit Interrupt
Source Select Bit
Communication Mode
Select Bit
Internal/External Clock
Select Bit
Reserved Bit
Transfer Format
Select Bit
Transmit Interrupt
Source Select Bit
2
2
" or "11
" or "11
Bit Name
Bit Name
2
2
" only.
" only.
Address
00ED
Address
012D
16
16
b1 b0
b1 b0
0 1: Clock synchronous serial I/O
1 1: HDLC data processing mode
0: Internal clock
1: External clock
Set to "0"
0: LSB first
1: MSB first
0: No data in the G0TB register
1: Transmission is completed
0 1: Clock synchronous serial I/O
1 1: HDLC data processing mode
0: Internal clock
1: External clock
Set to "0"
0: LSB first
1: MSB first
0: No data in the G1TB register
1: Transmission is completed
(TI=1)
(TXEPT=1)
(TI=1)
(TXEPT=1)
21. Intelligent I/O (Communication Function)
mode
mode
After Reset
00
After Reset
00
Function
Function
16
16
(1)
(1)
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
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